clawin@gypsy.ims.fhg.de (Detlef Clawin) (07/19/90)
In "Logic Minimization Algorithms for VLSI Synthesis", by R. Brayton ....
dealing with "espresso" several Berkeley PLA benchmarks are referenced,
e.g. ADD6, ADR4, ALU1. They are commonly referenced by other authors
for benchmarking logic optimization tools.
Does anybody know about a source for this benchmarks ore other
commonly used benchmarks ?
Any hints and remarks will be appreciated .
--
Detlef Clawin Phone: +49 203 3783 147
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/ / / /_/ Email: clawin@sonja.ims.fhg.de, {uunet}!unido!sonja!clawinkk@mcnc.org (Krzysztof Kozminski) (07/19/90)
In article <55@gypsy.ims.fhg.de> clawin@gypsy.ims.fhg.de (Detlef Clawin) writes: |In "Logic Minimization Algorithms for VLSI Synthesis", by R. Brayton .... |dealing with "espresso" several Berkeley PLA benchmarks are referenced, |e.g. ADD6, ADR4, ALU1. They are commonly referenced by other authors |for benchmarking logic optimization tools. | |Does anybody know about a source for this benchmarks ore other |commonly used benchmarks ? Some of these (and a number of others) are available by anonymous ftp from mcnc.mcnc.org. Look in the directory pub/benchmark/synth89 and its subdirectories. I believe also that all benchmarks references in the book you mention are included on the Berkeley software distribution tapes. KK -- Kris Kozminski kk@mcnc.org "The party was a masquerade; the guests were all wearing their faces."