[comp.lsi.cad] SIS logic optimizer

naumann@autarch.acsu.buffalo.edu (Dirk Naumann) (01/08/91)

Does anybody know the stage of development of the logic optimizer
SIS, which is supposed to do logic circuit optimization for
sequential circuits ?

Thanks in advance

-- 
Dirk Naumann
naumann@eng.buffalo.edu, ECE Department, SUNY at Buffalo