[comp.lsi.cad] Large placement benchmarks needed

rajeev@acura.ece.cmu.edu (Rajeev Jayaraman) (02/18/91)

I am working on a massively parallel layout
synthesis system and I would like 
to test this system on large industrial placement
benchmarks.  Specifically I 
am looking for:

1. Approximately 25000 or more placeable objects.
2. Some sort  of row-based placement  (standard 
cell, gate array, sea-of-gates)
3. Exact locations for pads on the periphery of
the placement area.

In order to preserve confidentiality, I don't need
a full functional description
of the circuit, I can work with network
descriptions that  just have simple gate
and net connections. I would appreciate hearing
from  people with such placement
benchmarks. 

Thanks in advance
Rajeev (rajeev@acura.ece.cmu.edu)

ps:  I  do know about the  MCNC benchmark suite,
and I   am looking beyond those
benchmarks.