jgouge@MITRE-GATEWAY.ARPA (12/30/86)
Does anyone have level 2 and/or level 3 spice transistor model files representing various process corners appropriate for the MOSIS scmos 3-micron process? Please respond directly to jgouge@mitre-gateway. Thanks, Jim Gouge
stern@princeton.UUCP (12/31/86)
actually, responses to the net would be appreciated. i'm looking for the same thing. --hal stern princeton university {ihnp4, seismo, allegra}!princeton!stern