notes@ucf-cs.UUCP (01/30/87)
Dear friends: The IEEE Comnputer Society Technical Committee on VLSI is holding a Workshop during February 22-25,1987 at Clearwater Beach, Florida ( Holiday Inn Surfside, 400 Mandalay Ave.,Clearwater Beach, Fl. 33515. Tel: 813-461-3222 ). The technical program is very good and is given below. As the Chairman of the TC on VLSI, I am inviting you to attend this Workshop For registration ( fee $150 , includes meals etc. ) please call Ms. Barbara Matus,Univ. of South Florida, Elec. Engg., Tampa , Florida 33620. Tel: 813- 974- 2369 ), and send your check promptly. Also, you should call the hotel and make reservation if you plan to ateend the Workshop. Thank you. Amar Mukherjee Workshop Chairman (305-275-2763) Technical Program Sunday Evening, February 22 5:00 p.m. Reception and Registration 6:15 p.m. Dinner 7:30 p.m. Welcome and Preliminaries Amar Mukherjee, University of Central Florida Michael Kovac, University of South Florida Session I: Technology 8:00 p.m. "Trends in CMOS Technology", Ron Young to 8:45 p.m. Harris Semiconductors, Melbourne, Florida 8:45 p.m. "Trends in GaAs Technology", to 9:30 p.m. Bertrand Gabillard, LEP, France 9:30 p.m. Informal Discussion to 10:00 p.m. Monday Morning, February 23 Session II: VLSI Algorithms & Architecture Session Chairs: Michael Foster, Columbia University Mary Jane Irwin, Pennsylvania State University 8:00 a.m. "Being Stingy with Multipliers", Robert Owens to 8:45 a.m. Pennsylvania State University 8:45 a.m. "Automated Mapping Process from Regular Algorithm to to 9:30 a.m. Physical Design", Chung K. Ko, Electrical Engineering Department, Columbia University 9:30 a.m. Coffee Break to 9:45 a.m. 9:45 a.m. "Iterative Computation in Non-Planar Arrays", Jorge L. Aravena to 10:30 a.m. Department of Electrical and Computer Engineering, Louisiana State University 10:30 a.m. "Residue Arithmetic -- Past, Present and Future", Fred Taylor to 11:15 a.m. University of Florida 11:15 a.m. Informal Discussion to 11:30 a.m. 11:30 a.m. Lunch Monday Afternoon, February 23, 1987 Session III: Physical Design Tools Session Chair: C. K. Wong IBM Research Center, Yorktown Heights 1:00 a.m. "System and Technology Considerations in Floorplanning" to 1:45 p.m Bill Heller, IBM, Poughkeepsie, NY 1:45 p.m. "Global and Detailed Wiring,", M. Marek-Sadowska, to 2:30 p.m. Dept. of EECS, University of California, Berkeley 2:30 p.m. Coffee Break to 2:45 p.m. 2:45 p.m. "Device Compilation", John Savage, Brown University to 3:30 p.m. 3:30 p.m. "Minimum Area Routing for Standard Cell Layout" to 4:15 p.m. Gregory A. Schaper and Amar Mukherjee, University of Central Florida 4:15 p.m. Informal Discussion to 4:30 p.m. Monday Evening, February 23, 1986 Session IV: Intelligent Design of VLSI Systems Session Chairs: Benjamin Wah, Univ. of Illinois J.A.B. Fortes, Purdue University 8:00 p.m. "Synergism between Systolic Design Methodologies" to 8:30 p.m. M. Chen, Yale University 8:30 p.m. "Intelligent Design of Control Algorithms for Non-linear to 9:00 p.m.: Systolic Analysis" B. Wah, University of Illinois ** 9:00 p.m. "Status and Future of DEFT: A Design for Testability to 9:30 p.m. Expert Systems" J.A.B. Fortes, Purdue University ** 9:30 p.m. to 10:00 p.m. TBA Tuesday Morning, February 24, 1987 Session V: VLSI Circuit Simulation & Verification Session Chair: Randal Bryant, Carnegie Mellon University 8:00 a.m. "Conservative Modeling in Integrated Circuits" to 8:45 a.m. Ronald Rohrer, Electrical and Computer Engr. Dept. Carnegie-Mellon University 8:45 a.m. "COSMOS - A COmpiled Simulator for MOS Circuits" to 9:30 a.m. Randal Bryant, Computer Science Department Carnegie-Mellon University 9:30 a.m. Coffee Break to 9:45 a.m. 9:45 a.m. "Verifying MOS Circuits" to 10:30 a.m. Daniel Weise, Dept. of Electrical Engineering, Stanford University 10:30 a.m. "Timing Analysis in a Silicon Compilation Environment" to 11:15 a.m. Tzu-Mu Lin, Silicon Compiler Inc. 10:30 a.m. Informal Discussion to 11:15 a.m. 11:30 a.m. Lunch Tuesday Afternoon, February 24, 1987 Session VI: CAD Tools" Session Chairs: Steve Rubin, Xerox PARC Steve Trimberger, VLSI Technology Inc. 1:00 p.m. "Symbolics CAD Tools" to 1:45 p.m. Clark Baker/Jim Cherry, Symbols Inc. 1:45 p.m. "Architecture for Synthesis" to 2:30 p.m. P.A. Subramanium, Bell Labs, Holmdel 2:30 p.m. Coffee Break to 2:45 p.m. 2:45 p.m. "Electric Design System" to 3:30 p.m. Steve Rubin, Xerox PARC, Palo Alto 3:30 p.m. "Rockwell Object Oriented Symbolic Editor" to 4:15 p.m. Robert P. Larson, Rockwell International, CA 4:15 p.m. Informal Discussion to 4:30 p.m. 4:30 p.m. Planning for 1988 VLSI Workshop to 5:00 p.m. Coordinator: Amar Mukherjee (Refreshments served) Tuesday Evening, February 24, 1987 Session VII: A Panel Session 8:30 p.m. to 10:00 p.m. TBA Wednesday Morning, February 25, 1987 Session VIII: Design Session Chair: Donald Bouldin, University of Tennessee 8:00 a.m. "A Systolic Architecture for PET Image Reconstruction" to 8:30 a.m. Michael E. Casey, Computer Technology & Imaging, Inc. 8:30 a.m. "The Georgia Tech Microelectronics Research Center" to 9:00 a.m. Jay Schlag, School of Electrical Engineering Georgia Tech, Atlanta, GA 9:00 a.m. "Implementing the HP Spectrum Architecture in VLSI" to 9:30 a.m. William McAllister, Computer Systems Division, Hewlett Packard, Cupertino, CA 9:30 a.m. Coffee Break to 9:45 a.m. 9:45 a.m. "Systolic Architecture for Signed Binary Arithmetic" to 10:15 a.m. Michael Andrews, Space Tech, Fort Collins 10:15 a.m. "An Experience with RISC" John W. Carr III, to 11:15 a.m. University of South Florida, Tampa 11:15 a.m. TBA to 11:45 a.m. ** These two talks will be substituted by : "Prolog Based Applications to Design,Analysis and Design Verification" N. C. E. Srinivas and V. D. Agarwal, At & T Bell Labs. "Logic Synthesis in Practice" P. Hortsman, IBM Corp.,General Technology Div. The talks by Drs. Wah and Fortes may be moved to Tuesday Evening.