[comp.lsi] mpla and new mosis rules

jimb@ogcvax.UUCP (04/21/87)

Before I re-invent the wheel, has anyone edited the scalable
cmos templates for mpla to match with the latest mosis technology
file?  As they stand now, several transistors are too near
well contacts.

Thanks for any/all assistance.

Jim Bailey
uucp: {allegra,bellcore,cornell,hp-pcd,sbcs,sequent,tektronix}!ogcvax!jimb
csnet: jimb@Oregon-Grad

tbridg@iuvax.cs.indiana.edu (04/24/87)

	Which technology & update are you talking about?  I didn't
notice any such change in the rev5 of the scalable design rules.
However, I am rerequesting the tech file & will check out my stuff
against the latest rev.  Thanks for pointing this out to me.