aglew@ccvaxa.UUCP (07/18/87)
I am interested in using SPICE to evaluate performance of a large system. Are there any SPICE circuit models that are widely used to compare systems? Just the names or a reference to published results would help, but source for the models would be appreciated. Andy "Krazy" Glew. Gould CSD-Urbana. USEnet: ihnp4!uiucdcs!ccvaxa!aglew 1101 E. University, Urbana, IL 61801 ARPAnet: aglew@gswd-vms.arpa
mark@mips.UUCP (Mark G. Johnson) (07/19/87)
In article <33600001@ccvaxa> > I am interested in using SPICE to evaluate performance of a > large system. Are there any SPICE circuit models that are > widely used to compare systems? Just the names or a reference > to published results would help, but source for the models > would be appreciated. > > Andy "Krazy" Glew. Gould CSD-Urbana. USEnet: ihnp4!uiucdcs!ccvaxa!aglew > 1101 E. University, Urbana, IL 61801 ARPAnet: aglew@gswd-vms.arpa About 3-4 weeks ago (16 comp.lsi articles ago at our site) I posted three SPICE benchmark input files, complete with their semiconductor model specifications. The article was: ... Message-ID: <1057@mips.UUCP> ... Subject: SPICE / floating-point benchmarks ... Keywords: Three new input files The three benchmarks used different semiconductor technologies: one was Schottky (bipolar) TTL, one was high-performance digital CMOS, and one was precision analog CMOS. I imagine that one of these 3 will be useful to you in your benchmarking. If some Usenet site(s) didn't receive this article, I'll be glad to repost. I'd like to request that you run these 3 benchmarks as well; I've posted the measured speeds of these, using both Berkeley SPICE 2G6 and Meta-Software HSPICE, for a few machines {and I'm hoping to lengthen the list!}. The original article was also cross-posted to comp.arch since it dealt with computer performance evaluation. Meanwhile, here are the model parameters for the 3-micron analog CMOS technology. It is optimized for use in building opamps, DACs, filters, etc., such as you'd find in modem chips, telecomm chips, filters, etc. ************************************* * TRANSISTOR MODELS FOR CMOS3 DEVICES **************************************** .MODEL NMOS NMOS( LEVEL=3, TOX=.50E-7, LD=0.26U, UO=785, + PHI=0.73, KAPPA=1, RSH=26, CGSO=3E-10, + CGDO=3E-10, CGBO=2E-10, CJSW=5.6E-10,MJSW=.5, + CJ=8E-4, MJ=.5, VMAX=1E5, + THETA=.110, VTO=0.90, GAMMA=1.15, NSUB=4.0E16) .MODEL PMOS PMOS( LEVEL=3, TOX=.50E-7, LD=0.17U, UO=265, + PHI=0.65, KAPPA=1, RSH=80, CGSO=3E-10, + CGDO=3E-10, CGBO=2E-10, CJSW=3.4E-10,MJSW=.5, + CJ=3.6E-4, MJ=.5, VMAX=6.6E4, + THETA=.135, VTO=-0.74, GAMMA=0.40, NSUB=6E15) -- -Mark Johnson *** DISCLAIMER: The opinions above are personal. *** UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mark TEL: 408-720-1700 x208 US mail: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086