sllu@venera.isi.edu.UUCP (12/02/87)
Dear MOSIS users, There has been some confusion as to why MOSIS is distributing a set of pads for her TINY CHIP frame (28pc23x34) with Magic (Berkeley VLSI layout tool) design rule checker (DRC) violations. First of all, these DRC violations are known to MOSIS. Furthermore these violations cannot be easily (safely) avoided. The particular violation - "This layer can't abut or partially overlap between subcells" in question will NOT cause any electrical NOR geometrical problem. Making the contacts twice the original size (so that the contacts are completely overlaped) will eliminate the DRC violation, but WILL cause more serious electrical problems. This problem will be flagged as a CIF generation error in Magic. The other group of DRC violations has to do with P+ select layers (which are automatically generated by Magic) getting too close to transistor channels. There are 16 pieces of diffusion layers used as shields to block the bloating of P+ selects. These diffusions does not have to follow the rules. If there are further questions, please feel free to send me e-mail or post them on the net. Shih-Lien Lu for MOSIS ARPA: sllu@mosis.edu USEnet: ...!seismo!sllu@mosis.edu
nclee@sbcs (Nai Chi Lee) (12/06/87)
In article <4218@venera.isi.edu>, sllu@venera.isi.edu (Lien Lu) writes: > ... The other group > of DRC violations has to do with P+ select layers (which are automatically > generated by Magic) getting too close to transistor channels. > There are 16 pieces of diffusion layers used as shields to block > the bloating of P+ selects. These diffusions does not have to follow > the rules. I just manually corrected all the above 16 drc errors ("select must be xx lambda away from transistor") for the nsf-padio. Anyone who is interested can get it from me, so that I won't feel that my effort was wasted :-) Now for a question: can "padio" of TinyChip be used for standard frames? I have already done so for "40P69X68", but those padio cells are so small that I have to add spacers to satisfy pad-to-edge restriction. -- Dr. Nai Chi Lee CSNET: nclee@sbcs.csnet ARPA: nclee%suny-sb.csnet@csnet-relay.arpa UUCP: {allegra, hocsd, philabs, ogcvax} !sbcs!nclee "It is difficult to make something foolproof because fools are so ingenious." [Anon]