[comp.lsi] Western Digital WD33c93 Controller

ericson@palladium.UUCP (George Ericson) (02/19/88)

Folks,

I'm looking for info/comments on the WD33c93a part.  Currently I am developing
a driver using the non-"a" part.

The documentation and condensed flowchart for that part describes the use of
intermdiate disconnects.  Both imply that on reselection, a resume SAT
command with phase 44 should process the rest of the command up to either
another disconnect or command completion.

This does not happen.  Instead, the identify message from the target must be
processed by the host.  This means either an indeterminate amount of interrupt
level processing or having to process an additional TRANSFER interrupt.
Neither options are attractive to me.  I'm hoping that this is just a bug in my
code, or in the implementation of the part.

Does anyone know the correct incantations to get the part to process the
identify message after the reselect.  I've tried to get help from the WD
folks, but the only people that I've been able to connect with just read the
same flowcharts and documentation that I have back to me.  (Not too useful.)

Thanks.

George M. Ericson, Epoch Systems, Inc. (617) 481-3717
313 Boston Post Road West, Marlboro, Ma., 01752
{linus!alliant, harvard!cfisun}!palladium!ericson

-- 
George M. Ericson, Epoch Systems, Inc. (617) 481-3717
313 Boston Post Road West, Marlboro, Ma., 01752
{linus!alliant, harvard!cfisun}!palladium!ericson