grout@sunspot.cad.mcc.com (Steve Grout) (08/23/88)
BUG REPORT: The following are inputs from CAD Language Systems Inc. (CLSI) after reviewing the shared test suite posted on or about July 1988. Paul Menchini, Director of Research and Development at CLSI, reports in part the following items noted in the subject shared VHDL test suite: 1. RETURN statements are not allowed in 1076 processes as they were previously in 7.2. In 1076, RETURN statements are only allowed in subprogram bodies. 2. The syntax of ATTRIBUTE declarations and specifications has changed from 7.2 to 1076. 3. The syntax of COMPONENT declarations has changed from 7.2 to 1076: They now must end with the keywords 'END COMPONENTS'. 4. The PORT and GENERIC maps of COMPONENT instantiations in 1076 are introduced respectively with the keywords 'PORT MAP' and 'GENERIC MAP'. Note that in 7.2 only the keywords PORT and GENERIC respectively were used. (Also note that the order of the map clauses has been reversed in 1076 with respect to 7.2.) 5. We seem to have interpreted the visibility rules differently from the way you did. We understand the USE clause "USE P.ALL" to be illegal unless it is proceeded by "USE WORK.P ;" as P is not directly visible by default. We typically use USE clauses of the form, "USE WORK.P.ALL ;" to establish visibility of the declarations of P in another unit. 6. One late change made to 1076 was that GENERATE statements are now required to have a label. Note that this label was optional in 1076/B (IEEE VHDL draft definition), but was added at the last moment as part of the work in straightening out indexed labels. 7. The syntax of COMPONENT specifications has changed between 7.2 and 1076. ====================================================================== Editor's Note: We agree with each the above items and are right now in the process of making the above corrections to the test suite. We are VERY greatful to both CLSI and Paul Menchini for identifying these problems with the tests. It will be only in that spirit that we will indeed be able to pull together an industry shared VHDL test suite as we all try to work towards formal VHDL validation. --jsgrout -- Steve Grout, MCC CAD Program | ARPA: grout@mcc.com | Phone: [512] 338-3516 Box 200195, Austin, TX 78720 | UUCP: ...!cs.utexas.edu!milano!cadillac!grout