marco@buengc.BU.EDU (Marco Zelada) (05/29/89)
This is a question for those of you who have used the Oct tool set from UCB. I would like to know if anyone could tell me how to do the following: I want to create a schematic view of a circuit entered at the BDSYN level. I am able to get a physical view for it, and according to the docs, I should be able to get the schematic view from misII if I load the proper library ( read_library ~octtools/lib/technology/scmos/gates/gates.genlib ), do the mapping ( map ) and write to the oct DB with the schematic view ( write_oct cell:schematic ). I tried this but could not get anywhere, because the gates.genlib is not complete and thus the mapping could not be done. Any ideas ? Could I get a complete gates.genlib file from somewhere ? Thanks in advance for any help. -- ______________________________________________________________________________ | Name: Marco Zelada | Tel: 617 353 9882, Fax: 353 6322 | | Group: VLSI CAD Research Laboratory | E-mail: marco@buengc.bu.edu | | Dept: Electrical & Computer Engineering| US-Mail: 44 Cummington St. | | Org: Boston University | Boston MA, 02215 | ------------------------------------------------------------------------------
ricks@shambhala.Berkeley.EDU (Rick L Spickelmier) (05/30/89)
I can send you a complete gates.genlib (along with instructions for creating constant 0 and 1 cells) that will allow you to map a misII network into the schematic symbols (rather than the standard cell library). However, we currently have no tool to layout the schematic and add routing (misII will give you a bunch of schematic symbols on top of each other with logic connections). We are working on one, but I don't expect it to be available for a while. Rick Spickelmier UC Berkeley CAD Group ricks@berkeley.edu