alexm@microsoft.UUCP (Alexander Mulder) (07/24/89)
The most striking feature of the Cray-3 for me is that it is built using GaAs CMOS. At least, that is what I've heard every time the Cray-3 was discussed. Now, I always thought that this just could not be true, because the electron mobility in GaAs may be much higher than that in Si, the hole mobility is MUCH less than Si. Still, the steady stream of information about the Cray-3 in GaAs CMOS continues. Something of that must be true ? Do they (Cray Computer, that is) use some magic compound for their P-devices ? If you know, please explain !! --- Alexander Mulder -------------------------------- uunet!microsoft!alexm --
brooks@portia.Stanford.EDU (Michael Brooks) (07/25/89)
As regards the Cray-3 GaAs devices: I work on GaAs (ohmic contacts, MESFETs) and can speculate a little bit about this, but I don`t know actually what Cray`s done for the GaAs based cpu. You are right about hole mobility in GaAs (Muller &Kamins has 8800 cm2/Vs vs 440 for electrons vs. holes for 300degK, though this is variable). They say you don`t build ptype devices in GaAs so a CMOS like equivalent doesn`t exist---at least to my knowledge. More likely there is a set of ntype MESFETs that have "complementary" like threshold voltages. When one is on, the other is off (basically one is an enhancment mode FET and the other is a depletion mode). It would be interesting to know exactly what Cray has done though. Mike Brooks/Stanford Electronics Labs (solid state)/SU
mark@mips.COM (Mark G. Johnson) (07/25/89)
In article <7048@microsoft.UUCP> alexm@microsoft.UUCP (Alexander Mulder) writes: >The most striking feature of the Cray-3 for me is that it is built using >GaAs CMOS. At least, that is what I've heard every time the Cray-3 was >discussed. Now, I always thought that this just could not be true, because >the electron mobility in GaAs may be much higher than that in Si, the >hole mobility is MUCH less than Si. Still, the steady stream of information >about the Cray-3 in GaAs CMOS continues. Something of that must be true ? >Do they (Cray Computer, that is) use some magic compound for their >P-devices ? > >--- Alexander Mulder ------------------- uunet!microsoft!alexm -- I have before me a copy of U.S. Patent number 4,638,188. The inventor is Seymour R. Cray of Chippewa Falls, Wisconsin. The assignee is Cray Research Inc. of Minneapolis, Minnesota. "PHASE MODULATED PULSE LOGIC FOR GALLIUM ARSENIDE" The patent describes a circuit family which is constructed of N-channel depletion-mode MESFETs, schottky diodes, and resistors. There are __no__ P-channel MESFETs. To quote the final sentence of the Abstract section of the patent: "The logic is preferably implemented in gallium arsenide metal oxide semiconductor technology, with the capacitors formed from reverse-biased Schottky diodes, and all FET switches capacitively coupled and self-biased". Perhaps this is the source of the confusion; Cray Research Inc. and Mr. Cray himself seem to refer to the technology as "Gallium Arsenide MOS". However, there is __no__ mention of complementary FETs in the patent. What *is* in the patent, however, is fascinating. The basic gate is a 16-input and-or-invert element: the NOR of 4 four-input ANDs. Each gate, as a side effect, also functions as a latch. What's really fascinating is that information is encoded as the phase (0 degrees or 180 degrees) of a 50-50 square wave. This guarantees that every signal must transition exactly once per cycle, so power-supply current transients are independent of what the logic is doing. Followers of Cray publications, dating way back to the early 60's and the CDC-6600, will recognize power-supply-stability as one of Mr. Cray's pet projects. +----+ +----+ +----+ +----+ +----+ +----+ CLOCK | | | | | | | | | | | | ----+ +----+ +----+ +----+ +----+ +----+ +---- . . . . . . . . . . . . . . . . . . . . . +----+ . +----+ +---------+ +----+ . +----+ DATA | | . | | | . | | | . | | ----+ +---------+ +----+ . +----+ +---------+ + . . . . . . . . 1 . 0 . 0 . 1 . 1 . 0 . . . . . . . . (Incidentally, I didn't just stumble upon this patent while perusing the Official Gazette :-). It was published in the IEEE Journal of Solid-State Circuits, which is where I found it.) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * There have been papers published about complementary MESFET GaAs, but _not_ by Cray Research. The ones that I've seen use the really crappy P-MESFETS for exactly one purpose: to construct very low-power load elements inside static memory cells. P-MESFETS were not used anywhere else (presumably because the gm is so rotten due to poor hole mobility). -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086 ...!decwrl!mips!mark (408) 991-0208
michell%cs.utah.edu@wasatch.utah.edu (Nick Michell) (07/26/89)
My understanding was that the Cray-3 uses Buffered FET Logic with only depletion-mode devices. This is fast but uses a lot of power - no problem if you've only got a few hundred gates on a chip. I don't remember who they're getting parts from, but I think it's either Gigabit or Triquint. Enhancement and Depletion-mode devices can be made using MESFETs, and Nmos-like circuits can be built (with a lot of restrictions). Vitesse claims to be able to make VLSI-density chips with fairly low power (much lower than ECL, at any rate), but the gates are not as fast as in the parts Cray is using. Complementary logic is possible using JFETs, but as already pointed out, the performance of the p-type devices is pretty horrible. /Nick Michell, University of Utah michell@cs.utah.edu
arnief@tekgvs.LABS.TEK.COM (Arnie Frisch) (07/28/89)
In article <24035@obiwan.mips.COM>, mark@mips.COM (Mark G. Johnson) writes: > I have before me a copy of U.S. Patent number 4,638,188. > > "PHASE MODULATED PULSE LOGIC FOR GALLIUM ARSENIDE" > > The patent describes a circuit family which is constructed of > N-channel depletion-mode MESFETs, schottky diodes, and resistors. Various forms of AC coupled logic have been implemented before, in GaAs and other technologies. I believe some previous work was done in England in GaAs. Just because CRAY has this patent doesn't mean that this is the methodology of the CRAY 3. Arnold Frisch Tektronix Laboratories