[comp.lsi] On-Line Detection

vestal@SRC.Honeywell.COM (Steve Vestal) (10/18/89)

I'm trying to learn a little more about what I've seen called on-line or
concurrent fault/error detection; e.g., the use of parity, ECC, M of N voting,
etc. within circuits to detect faults/errors.  I'm more interested in
detection than masking/correction, and I'm particularly interested in
implementation complexity/overhead and modeling issues like fault latency,
coverage, etc.

I would greatly appreciate it if someone would email me some references,
perhaps the name of a favorite text, that would give me an introduction
to these issues.

Steve Vestal
Mail: Honeywell S&RC MN65-2100, 3660 Technology Drive, Minneapolis MN 55418 
Phone: (612) 782-7049                    Internet: vestal@src.honeywell.com

news@pitt.UUCP (The News program) (10/19/89)

From: shorty@jupiter.cs.pittsburgh.edu (Saverio Fazzari)
Path: jupiter!shorty


		Thanks
			Saverio Fazzari
			
			shorty.ee.pitt.edu
		 


-- 
Network News Administrator
Pitt Computer Science

mark@mips.COM (Mark G. Johnson) (10/19/89)

In article <35374@srcsip.UUCP> vestal@SRC.Honeywell.COM (Steve Vestal) writes:
>I'm trying to learn a little more about what I've seen called on-line or
>concurrent fault/error detection; e.g., the use of parity, ECC, M of N
>voting, etc. within circuits to detect faults/errors.  I'm more interested
>in detection than masking/correction, and I'm particularly interested in
>implementation complexity/overhead and modeling issues like fault latency,
>coverage, etc.
>


T. Rao and E. Fujiwara, "Error-Control Coding for Computer Systems",
Prentice-Hall, Copyright 1989, ISBN 0-13-283953-9.  7.0 x 9.5 inches,
524 pages.  (I paid $45 for it at a nondiscount bookstore).
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	(408) 991-0208    mark@mips.com  {or ...!decwrl!mips!mark}