[comp.lsi] References needed for layout cap algorithm and comm. ambiguity

buchs@MAYO.EDU (Kevin J. Buchs) (10/23/89)

Can anyone help me with references on these topics:

1. Algorithms for computing precise timing for digital circuits taking into
   account the detailed capacitance of the layout routing on an IC.

2. Common Ambiguity Removal (reconvergent fanout) for timing simulation.

Please mail to buchs@mayo.edu.

Thanks,

Kevin J. Buchs
Mayo Foundation Special Purpose Processor Group
Rochester, MN
507-284-0009