jxw@rods.ius.cs.cmu.edu (John Willis) (05/06/90)
As part of a PhD thesis on compiled simulation of mixed-level hardware description languages for parallel processors, I have spent the last two years working on a heavily modified version of GNU's GCC capable of compiling VHDL (and a subset of Verilog & SCALD .wdp). No CLSI or Intermetrics code is incorporated in the compiler. We expect the tool to be available following acceptance of the thesis and "validation" using the AF and Intermetrics tests. Currently this looks like December 1990, but I've slipped schedule once before on this project. For details see the Spring 1990 VHDL User's Conference proceedings or contact the author (jxw@cs.cmu.edu) for US mail reprints. Any medium to large scale designs suitable for testing would be welcome! -John