jesse@jupiter.uucp (Norbert Jesse) (08/02/90)
INVITATION AND PROGRAM
GME/GI/ITG - CONFERENCE
Computer Aided Design and Architecture of
Microelectronic Systems
October 1 - 2, 1990 in Dortmund
For the first time the VDE/VDI-Gesellschaft Mikroelektronik (GME), the
Gesellschaft fuer Informatik e.V. (GI) and the Informationstechnische
Gesellschaft im VDE (ITG) are organizing a joint conference. This conference
entitled 'Computer Aided Design and Architecture of Microelectronic
Systems' intends to provide a platform for the exchange of experiences and
for discussions on recent and novel research in the areas of 'CAD for
Microelectronics' and 'Architectures of Very Large Scale Integrated Systems'.
It is envisioned to foster the contacts among research groups at universities, research
institutes and industry.
According to this general purpose the conference will deal with the following
subjects:
- Specification of VLSI Circuits
- Architectural Design, Logic Design and Optimization
- Physical Design
- Design Verification
- Testing and Reliability
- Simulation and Modeling
- CAD-Environments
- Design Methodology and Design Management
- Architectures of Integrated Systems
- Technology Modeling.
An exposition will be held during to the conference providing an opportunity
to present software systems or descriptions thereof with posters.
Organizer
=========
VDE/VDI-Gesellschaft Mikroelektronik (GME), Section 5 Software
for Microelectronics
Gesellschaft fuer Informatik e.V. (GI), Section 3.5 Design
and Architectures of Large Scale Integrated Circuits and Systems
Informationstechnische Gesellschaft im VDE (ITG), Section 4.1
Hardware-Architecture und Section 5.2 Computer Aided Design
General Chairman
================
Prof. Dr. B. Reusch, Dortmund
Program Commitee
================
Prof. Dr. K. Antreich, TU Muenchen
Dipl.-Ing. J. Eggers, Valvo GmbH, Hamburg
Prof. Dr. W. Fichtner, ETH Zuerich
Prof. Dr. M. Glesner, TH Darmstadt
Prof. Dr. W. Grass, Universitaet Passau
Prof. Dr. H. Gruenbacher, TU Wien
Dipl.-Ing. H. Heckl, GMD, St. Augustin
Prof. Dr. J. Jess, TU Eindhoven
Prof. Dr. P. Marwedel, Universitaet Dortmund
Prof. Dr. J. Mucha, Universitaet Hannover
Prof. Dr. F. J. Rammig, Universitaet-GH Paderborn
Prof. Dr. B. Reusch, Universitaet Dortmund (Chairman)
Dr. W. Rosenstiel, Universitaet Karlsruhe
Dr. G. Venzl, Siemens AG, Muenchen
Prof. Dr. K. Waldschmidt, Universitaet Frankfurt
Dr. D. Wolff, Telefunken electronic GmbH, Heilbronn
Dr. K. Zibert, Siemens AG, Muenchen
Prof. Dr. G. Zimmermann, Universitaet Kaiserslautern
Organization Commitee
=====================
Prof. Dr. G. Dittrich, Universitaet Dortmund (Chairman)
Dipl.-Inform. A. Hoeffmann, Universitaet Dortmund
Inform. (grad.) W. Hunscher, Universitaet Dortmund
Dr. N. Jesse, Universitaet Dortmund
Prof. Dr. C. Moraga, Universitaet Dortmund
Dr. G. Szwillus, Universitaet Dortmund
CONFERENCE PROGRAM
Monday, October 1, 1990
9:00 Welcome and Opening Address
Prof. Dr. B. Reusch
Greetings:
Rector of University of Dortmund
Minister of Science ond Research, Nordrhein-Westfalen
Lord Mayor of the City of Dortmund
9:30 Invited Speaker
European CAD: Where are we going?
J. Borel, SGS-Thomson, Grenoble
10:30 Coffee Break
11:00 Session 1 (Chair: J. Jess, Eindhoven)
TANGO: Ein objektorientierter Ansatz zur Technologieanpassung von IC-Layouts
R. Brueck, E. Migas, Universitaet Dortmund, Lehrstuhl Informatik 1
Hierarchical Netlist Extraction and Design Rule Check
W. Meier, Siemens AG, Muenchen
HIPARE: Hierarchical Circuit and Parameter Extraction from Mask Layout Data
U. Roettcher, J. Fritz, F. Krohm, G. Hess, Fraunhofer-Institut fuer
Mikroelektronische Schaltungen und Systeme, Duisburg
12:30 Lunch
14:00 Session 2 (Chair: J. Eggers, Hamburg)
Synthese von Komplexgatter-Schaltnetzen unter Beruecksichtigung der
Transistoranzahl
Ch. Wolters, Dosis GmbH, Dortmund
Timing Driven Partitioning of Combinational Logic
N. Wehn, M. Glesner, A. Kister, S. Kastner, TH Darmstadt, Institut
fuer Mikroelektronische Systeme
Ueber ein Min-Cross Kanalrouting-Problem
M. May, Akademie der Wissenschaften der DDR, Zentralinstitut fuer
Kybernetik und Informationsprozesse, Berlin
Diffusion - An analytic procedure applied to global macro cell placement
P.V. Kraus, D.A. Mlynski, Institut fuer Theoretische Elektrotechnik und
Messtechnik, Universitaet Karlsruhe;
C.-M. Kyung, Korea Advanced Institute of Science and Technology, Seoul
16:00 Coffee Break
16:30 Session 3 (Chair: G. Venzl, Muenchen)
Rechnergestuetzte Spezifikation in einer integrierten Entwurfsumgebung
fuer anwendungsspezifische Systeme
J. Bortolazzi, K.D. Mueller-Glaser, Lehrstuhl fuer Rechnergestuetzten
Schaltungsentwurf, Universitaet Erlangen-Nuernberg
A Concept of Defining Semantics of Concurrent Microprograms
M. Gondzio, Institute of Computer Science, Warsaw University of
Technology, Poland
A Methodology for Hierarchical Module Generator Specification
D. Tovey, V. Valdivia, Siemens AG, Muenchen, Zentralabteilung Forschung
und Entwicklung
19:30 Westphalian Evening
Tuesday, October 2, 1990
8:30 Session 4 (Chair: D. Wolff, Heilbronn)
A New Allocation Method for the Synthesis of Partitioned Busses
Ch. Ewering, FB Mathematik/Informatik, Universitaet-GH Paderborn
Architekturentwurf fuer nebenlaeufige, funktionssichere Steuerungen
G. Klein-Hessling, M. Schaefer, Siemens AG, Muenchen, Zentralabteilung
Forschung und Entwicklung
CASCH - ein Scheduling-Algorithmus fuer 'High-Level'-Synthese
P. Gutberlet, H. Kraemer, W. Rosenstiel, FB Automatisierung des
Schaltkreisentwurfs, Forschungszentrum Informatik, Universitaet Karlsruhe
OASE: A Knowledge Based Environment for Analog Circuit Design
K. Hoffmann, M. Mertens, K. Milzner, Universitaet Dortmund, Lehrstuhl
Informatik 1;
W. Brockherde, G. Hess, R. Klinke, F. Krohm, Fraunhofer-Institut fuer
Mikroelektronische Schaltungen und Systeme, Duisburg
10:30 Coffee Break
11:00 Session 5 (Chair: K. Antreich, Muenchen)
Zum automatischen Einfuegen von Testpunkten in sequentielle Schaltungen
H. Gundlach, K.-D. Mueller-Glaser, Universitaet Erlangen-Nuernberg,
Institut fuer Rechnergestuetzten Schaltungsentwurf
Testbarkeitsanalyse beim hierarchischen top-down Entwurf
E.J. Lehner, H. Hofestaedt, Siemens AG, Muenchen
Ein neues, effizientes Verfahren zum Testpunkteinbau in kombinatorischen
Schaltungen
B.H. Seiss, TU Muenchen, Lehrstuhl fuer Rechnergestuetztes Entwerfen;
M.H. Schulz, Siemens AG, Muenchen
12:30 Lunch
14:00 Session 6 (Chair: W. Fichtner, Zuerich)
KOSIM - ein Mixed-Mode, Multi-Level-Simulator
P. Schwarz, C. Clauss, U. Donath, J. Haufe, G. Kurth, P. Trappe, Akademie
der Wissenschaften der DDR, Zentralinstitut fuer Kybernetik und
Informationsprozesse, Dresden
ATTACC - an Automated Tool for Timing Analysis and Cell Characterization
T. Schwederski, T. Buechner, W. Haas, Institut fuer Mikroelektronik Stuttgart;
M. Zahn, FH Ravensburg-Weingarten
Parallele Simulatoren fuer VLSI - Stand und Zukunftslinien des DISIM-Systems
E. Aposporidis, W. Jud, F. Lohnert, Daimler-Benz AG, Forschungsinstitut Berlin
Das Simulatorkopplungsprojekt
M. Bechtold, T. Leyendecker, Universitaet Frankfurt;
M. Niemeyer, A. Oczko, C. Oczko, Cadlab, Paderborn
16:00 Coffee Break
16:30 Session 7 (Chair: W. Grass, Passau)
Automatisierter Entwurf von Schaltungen fuer die schnelle digitale
Signalverarbeitung
U. Vehlies, A. Muenzner, Institut fuer Theoretische Nachrichtentechnik
und Informationsverarbeitung, Universitaet Hannover
Optimierung von Schaltungen mit determinierten und statistischen Suchverfahren
E. Lueder, J. Schaepperle, Universitaet Stuttgart
Rapid Prototyping mikroelektronischer Hardware-Software-Systeme durch
Emulation
K. Scherer, Fraunhofer-Institut fuer Mikroelektronische Schaltungen und
Systeme, Duisburg;
O. Rettig, Universitaet Stuttgart, Institut fuer Parallele und Verteilte
Hoechstleistungsrechner
18:00 Closing Remarks
Poster Exposition
Parallel to the conference lectures the following subjects will be presented
within a poster exposition:
A Systematic Approach for Multidimensional Digital Signal Processing Arrays
M.B.E. Abdelrazik, University of West London
Realisierung eines hochgradig parallelen Datenreduktionssystems fuer HDTV
auf der Basis einer 64*64-FFT/DCT
V. Axelrad, S. Eckart, H. Plansky, H. Steckenbiller, H. Thurner,
TU Muenchen, LS fuer Integrierte Schaltungen
SPICE Parameterextraktion von GaAs - MESFETs
P. Baureis, Fraunhofer-Arbeitsgruppe fuer integrierte Schaltungen, Erlangen
Das Simulatorkopplungsprojekt
M. Bechtold, T. Leyendecker, Universitaet Frankfurt;
M. Niemeyer, A. Oczko, C. Oczko, Cadlab, Paderborn
DINGO-XT: A Novel Approach to Technology Data Interchange
R. Brueck, Universitaet Dortmund, LS Informatik 1
Entwurfsmanagement eines komplexen Gate Arrays
D. Coy, G. Schoene, Telefunken Systemtechnik, Wedel
Zur Darstellung und Auswertung von Hardware-Simulationsergebnissen
T. Dettmer, Universitaet Dortmund, LS Informatik 1
EXTRA: Ein integriertes Layout-Verifikationssystem mit besonderer Eignung
fuer Bipolarschaltungen
G. Dosedal, U. Langmann, Mikroelektronik-Zentrum, Universitaet Bochum
Eine Entwicklungsumgebung fuer Verfahren zur automatisierten Generierung
von Testhilfen
M. Frei, Mikroelektronik-Zentrum, Universitaet Bochum
High Performance Implementation of Layout Verification and Detailed Routing
based on a Novel Machine Paradigm
R. W. Hartenstein, G. Hirschbiel, M. Weber, Universitaet Kaiserslautern
Der 2D-Technologiesimulator DIOS
R. Huenlich, U. Krause, R. Model, A. Pomp, I. Schmelzer, H. Stephan,
N. Strecker, S. Unger, Karl-Weierstrass-Institut fuer Mathematik, Berlin
Probleme der Modellierung und Simulation des Programmierverfahrens von
Floating-Gate-Transistoren fuer die EPROM-Entwicklung
J. Kosch, Forschungszentrum Mikroelektronik, Erfurt
Integriertes Entwurfs- und Testsystem zur schnellen Prototypen-
Charakterisierung
C. Kuntzsch, K. Helmreich, W. Wolz, Universitaet Erlangen-Nuernberg
Rechnergestuetzter Entwurf graphischer Schemata
M. May, S. Kluge, J. Sieck, Akademie der Wissenschaften der DDR,
Zentralinstitut fuer Kybernetik und Informationsprozesse, Berlin
Test Strategy Planning for Modular Circuits
M. Pabst, Siemens AG, Muenchen
DISTECT - Flexibilitaet und Effizienz fuer die geometrische Layout-
Verifikation
G. Pelz, Fraunhofer-Institut fuer Mikroelektronische Schaltungen und Systeme,
Duisburg
3D-CMOS Defects and Fault Modelling
G. Roos, B. Hoefflinger, T. Schwederski, R. Zingg, Institut fuer
Mikroelektronik Stuttgart
Globalphase des Layoutentwurfs bei Gate Arrays
W. Schade, B. Goetze, J. Liske, W. Nehrlich, B. Stube,
Karl-Weierstrass-Institut fuer Mathematik, Berlin
Zur Strukturierung grosser elektrischer Netzwerke mit Hilfe des Signalflusses
M. Uhle, Karl-Weierstrass-Institut fuer Mathematik, Berlin
Ladungsorientierte Modellierung fuer Kurzkanal-MOS-Transistoren
H. Uhlmann, S. Rochel, TH Ilmenau, Wissenschaftsbereich Theoretische
Elektrotechnik
On the Construction of L * n Boolean Matrices with All L * k Submatrices
Having 2**k Distinct Row Vectors
H. Wu, Universitaet des Saarlandes, FB Informatik
GENSYS - Ein hierarchisches Generatorsystem
R. Zavala, M. Selz, K.D. Mueller-Glaser, Universitaet Erlangen-Nuernberg
FURTHER INFORMATION
Conference Secretariat
======================
The conference secretariat is located
- until September 28, 1990, at 'Lehrstuhl Informatik I', University of
Dortmund, Postfach 50 05 00, D-4600 Dortmund 50,
Phone (0231) 755-2130 und -4391,
- October 1 - 2, in front of the conference rooms, Phone (0231) 1204-230.
Location
========
Westfalenhallen Dortmund, Goldsaal und Konferenzraum 5, Rheinlanddamm 200,
4600 Dortmund 1, Telefon (0231) 1204-230.
Registration
============
It is requested that the participants - including the lecturer - return
the registration form to the given address. Registrations by August 31
guarantee the entry in the conference register. Please use a separate
form for each participant. If there are several participants, please use
copies for additional registration forms.
Conference Fees
===============
The fees include the conference proceedings, coffee breaks and the westphalian
evening.
Regular fee DM 320,-
Regular fee
(GME-, GI-, ITG-Members) DM 240,-
University fee DM 280,-
(with certified proof of
faculty/university or student
membership)
University fee
(GME-, GI-, ITG-Members) DM 210,-
Students, draftees, conscien-
tious objectors, unemployed DM 50,-
Later than August 31, 1990, the fees augment by DM 40,- (DM 20,- for students
and persons on an equal footing). Students and persons treated the same
will receive no conference proceedings. The reduced fee also applies
to members of comparable European computer science-societies. Scientists from
the German Democratic Republic are treated the same as GME-/GI-/ITG-
Members.
Without certified proof of faculty/university or student membership no
discount can be granted.
Payment
=======
Please remit the conference fee to the Account No. 307 301 89,
Freundegesellschaft der Universitaet Dortmund, (BLZ 440 103 00),
at the Amro Handelsbank AG, Westenhellweg 22-24, 4600 Dortmund 1,
and state as intended purpose 'GME/GI/ITG-Conference'.
Do not forget to enter the participants' name on the paying-slip for
correct crediting. After receipt of your payment we will send you an
invoice/confirmation. Your registration will become valid only after
receipt of the full amount of the registration fee.
Cancellation
============
Cancellation cannot be accepted after August 31, 1990. Reimbursements will
be made only after the conference. A handling charge of 10 % of the fee
(minimum DM 40,-) will be deducted. Cancellations after August 31 cannot be
reimbursed; the conference proceedings will be mailed to the requested
person who could not participate.
Accomodation
============
Hotel reservations should be made directly by each participant. Please
contact the following local agency:
Dortmunder Verkehrsverein e. V.,
- Zimmervermittlung -, Koenigswall 20, 4600 Dortmund 1,
Telefon (0231) 14 03 41 und 542-22164/-74.
A limited number of rooms have been reserved near the conference location
until August 15, 1990.
Proceedings, Conference Pass and Documents
==========================================
The results of the conference will be published in the proceedings (series
'Informatik/Fachberichte', Springer-Verlag). The fee for the proceedings
is included in the participation fee (except for students). The Conference
pass and the participation list are distributed before the beginning of
the conference.
Exposition
==========
Parallel to the conference there will be a presentation of software systems
and descriptions thereof with posters.
Conference Languages are German and Englisch. No simultaneous translation
====================
will be provided for the conference.
How to reach Dortmund
=====================
By air through Duesseldorf International Airport, train No. S7 up to
station 'Duesseldorf-Unterrath' and train no. S1/S21 up to
'DO-Hauptbahnhof' or straight with train no. S21;
by train from station 'DO-Hauptbahnhof' with train no. U45 up to station
'Westfalenstadion' or train no. U49 up to station ' Westfalenpark';
by car via road no. 'B 1' following the sign 'Westfalenhallee;
by air through airport 'Dortmund-Wickede' it is recommended to take a taxi.
Phone
========
during the conference at the Conference Office, Tel. (0231) 1204-230. Telefax-
und 'electronic mail'-connections are planned.
Westphalian Evening
==================
On Monday, October 1, 19:30 p. m., a buffet dinner will take place within
the brewery of theDortmunder Actien Brauerei, Steigerstrasse 20, 4600
Dortmund 1.
.............................................................................
Registration form to the GME/GI/ITG - CONFERENCE
'Computer Aided Design and Architecture of Microelectronic Systems'
October 1 - 2, 1990 in Dortmund
Surname......................... First name.........................
Title........................ Department.........................
Company...........................................................
Street.............................................................
Country.......... Postal Code........ City...............
Telephone..........................................................
Telex/Telefax......................................................
Conference fees
including the conference proceedings, coffee breaks and the Westphalien
evening
Registration after
August 31, 1990
Regular fee o DM 320,- o DM 360,-
Regular fee
(GME-, GI-, ITG-Members) o DM 240,- o DM 280,-
University fee o DM 280,- o DM 320,-
(with certified proof of
faculty/university or student
membership)
University fee
(GME-, GI-, ITG-Members) o DM 210,- o DM 250,-
Students, draftees, conscien-
tious objectors, unemployed o DM 50,- o DM 70,-
(Please indicate the correct fee)
City, Date........................ Signature.....................
.............................................................................
Send form to:
Universitaet Dortmund
FB Informatik LS 1
Postfach 50 05 00
D-4600 Dortmund 50
The conference is sponsored by
- Stadtsparkasse Dortmund
- Dosis GmbH
- Philips Gmbh
- Siemens GmbH.