craig@calvin.UUCP (Craig S. Cochran) (08/05/90)
In article <12363@encore.Encore.COM> jcallen@encore.com (Jerry Callen) writes: >In article <140081@sun.Eng.Sun.COM> shrenik@pyramis.Eng.Sun.COM (Shrenik Mehta) writes: >> [Announcment of new book on Verilog Hardware Description Language] > >Lemme see now, that's "Verilog Hardware Description Language" - by golly, >that's VHDL! I've been hearing all about that lately; something about >VHDL use mandated on government work or something. Geez, sounds great! > >Seems like there is potential for confusing Verilog HDL with: > > VHSIC Hardware Description Language (VHDL) > >where VHSIC stands for Very High Speed Integrated Circuit. _This_ VHDL was >designed by Intermetrics and is the one the government likes. > >Of course, for all I know, Verilog HDL may in fact _be_ VHSIC HDL. The language >is (I believe) in the public domain, and Intermetrics licenses its VHDL >compiler to other companies; I think other companies have also written >VHDL compilers. Does anyone KNOW if Verilog HDL is VHSIC HDL? > >This is not meant as a flame at Verilog (or anyone); I just wanted to >head off some possible confusion. There are several Hardware Description Languages (HDLs) currently being used. The chief one is VHDL, but others include Verilog HDL and Genrad HDL (GHDL). "Verilog HDL" was a proprietary Hardware Description Language (HDL) developed by Gateway Design Automation. It has no connection with VHDL. Gateway was recently acquired by Cadence, who decided to "open" Verilog HDL as a standard when it became apparent that VHDL, developed by Intermetrics and mandated by the Government, would become the predominant HDL on the market. It was primarily a defensive move on Cadence's part. The book in question is a result of this action. While Verilog HDL has many powerful structures for describing behavioral and structural designs, it does not have the flexibility and configurability that VHDL has. VHDL allows user-defined enumerated types (ala Pascal) as well as overloaded operators and functions. These are very important since they allow the user to define their own system of logic values and strengths, as well as bus-resolution functions for the user's specific technology. Because of these features, VHDL is more portable between simulators and design technologies, and will probably win the "standards battle" (the Government's ultimatum to use VHDL will also help). The Intermetrics VHDL division has been acquired by Valid Logic Systems, which is in the process of integrating the VHDL Design Environment into its Logic Workbench Design Framework. There are other companies providing VHDL simulation, some with most of the language implemented, others with subsets. Since VHDL is such a huge language, only a few companies (Valid, Vantage, Zycad) provide a full VHDL language compiler and simulator. Feel free to e-mail me for more information regarding VHDL. Craig Cochran <sun!valid!ccochran> or <decwrl!valid!ccochran> Digital Simulation Applications Engineer -- Craig S. Cochran Valid Logic Systems Path: {sun,decwrl}!valid!ccochran 2820 Orchard Parkway Voice: 408/944-8037 San Jose, CA 95134