mpurtell@pv0549.vincent.iastate.edu (Purtell Michael J) (09/25/90)
I'm in a VLSI class where we'll each be doing a full custom design for our
final project and I'm exploring the possibility of using edge triggered
or self-clocked(?) logic in the design (A Mandelbrot set generator,
this point).
I've read Ivan Sutherland's Turing Award lecture on the subject and would like
some references to other papers written on this subject and papers on actual
implementations in silicon. Or any experiences any of you have had with it.
Thanks for any pointers you can give me!
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Michael Purtell ---- mpurtell@iastate.edu
Iowa State University ---- Birthplace of the first electronic digital computer
------------------------------------------------------------------------------grege@gold.GVG.TEK.COM (Greg Ebert) (09/25/90)
mpurtell@iastate.edu (Purtell Michael J) writes: >I'm in a VLSI class where we'll each be doing a full custom design for our >final project I could tell you a horror story about my full-custom chip I did at UCLA... >and I'm exploring the possibility of using edge triggered >or self-clocked(?) logic in the design (A Mandelbrot set generator, >this point). I've been designing chips for over 5 years, and I'll swear by using fully- synchronous logic. Self-clocked logic IS feasible and DOES work, but you have to be extremely careful with timing. A mandelbrot generator is a rather complicated device, and you have a (very) limited amount of time to get this thing designed, entered, rule-checked, simulated, debugged, analyzed, fabricated, and tested. #ifdef SERMON I don't mean this sarcastically, but good luck. I was still working on mine during finals week and seriously considered not taking my history final so I could work on my chip (why take an exam you didn't have time to study for ?) Chip design is fun and challenging. Don't try to burn yourself out now, because there will be plenty of opportunity for that on-the-job. #endif
roger@wucs1.wustl.edu (Roger Chamberlain) (09/27/90)
In article <910@attila.WEITEK.COM> severino@attila.WEITEK.COM (andrea severino) writes: >There are many articles about what you are saying >a little bit everywhere. There was a group of people at >the university of Washington (under a fello by the name of Molnar) >who have written a great deal about self-clocked mechanisms. > >And there are a lot of articles about metastable and automatic >de-skewing circuits written by labs and universities. > >What is your motivation? What constraints? Yes, Charles Molnar and company have done a lot of work on self-clocked and delay insensitive circuits. However, they are not at the Univ. of Washington, Seattle, but rather at Washington Univ., St. Louis. The two schools get enough of each others mail as it is, please don't send requests for tech. reps., reprints, etc. to Seattle. :-) Roger Chamberlain roger@wuccrc.wustl.edu Computer and Communications Research Center Campus Box 1115 Washington University St. Louis, MO 63130 USA (314)-889-5708