rays@steamboat.cadence.com (Ray Salemi; x366) (10/01/90)
I have started a new reflective mailing list to discuss the Verilog Hardware Description Language. Cadence opened the Verilog Language to the public this year, and will hand over control of the language to a steering committee. This mailing list will help focus discussion about the Verilog language and can also let users swap tricks and ask each other questions. The list is implemented as an unmoderated reflector. It currently has people from Sun, Encore, Prime and several other sites. Cadence's Verilog engineers are on the list as well as me, the Verilog/PLI technical specialist. Here are the addresses: The List - verilog@cadence.com To Join or Leave - verilog-request@cadence.com This list will be the best place to enter your views on where Verilog should go, or to find the answers to tricky Verilog questions. If the traffic get's large enough it may grow into a newsgroup (comp.lang.verilog?) Enjoy the list! Ray Salemi All opinions expressed here are my own rays@cadence.com and don't reflect the views of Cadence. Cadence Design Systems