rabbit42@matt.ksu.ksu.edu (Bruce Corwin McLaren) (11/20/90)
Has anyone successfully done npn transistors in magic using the new scmos tech file (the low_noise_analog process from mosis) ? How are they arranged? The design rules seem to say that the emitter must be overlapped by the base but the collector cannot touch the base. Also, are the resulting transistors extractable? Sorry for the simplsitic questions, but I am getting a might confused. Bruce McLaren mclaren@eesun1.eece.ksu.edu or rabbit42@matt.ksu.ksu.edu or rabbit42@ksuvm
sllu@jenny.isi.edu (Shih-Lien Lu) (11/20/90)
>Has anyone successfully done npn transistors in magic using >the new scmos tech file (the low_noise_analog process from mosis) ? Yes we have. We may be able to arrange public ftp of an npn transistor. >How are they arranged? >The design rules seem to say that the emitter must be overlapped >by the base but the collector cannot touch the base. Yes. The emitter is covered by the pbase layer while colloect contact cannot touch the pbase. The nwell is the collector and the collect contact ties the collect to metal. >Also, are the resulting transistors extractable? Not right now. In the future, MOSIS will offer post-processing program that will allow user to do auto-extraction of npn transistors. >Sorry for the simplsitic questions, but I am getting a might confused. We apologize for any confusion resulted for our messages,documents and annocements. I have a new doc. on the new SCMOS technology file. You may request a hard copy by sending a message to MOSIS. Shih-Lien Lu for MOSIS