[comp.lsi] CALL FOR VOTES: comp.lang.vhdl

dettmer@jupiter.informatik.uni-dortmund.de (Thomas Dettmer) (11/26/90)

CALL FOR VOTES for "comp.lang.vhdl"

Please SEND YOUR VOTE BY E-MAIL during the voting period from november 26th
to december 16th, following the format defined at the end of this article.

NAME/GROUP: 
     comp.lang.vhdl

     VHDL is a COMPuter LANGuage. This is the appropriate place to put it
     in. (generally agreed in the discussion). There was some discussion
     about comp.lang.hdl[.*], but most of the answers I got agreed with
     comp.lang.vhdl. The only other interest mentioned more than once (3
     times) was edif. Because there's not much traffic about general HDL's,
     they can further be discussed in comp.lang.lsi.

STATUS: 
    unmoderated

    was agreed by all answers until today (see below).

CHARTER:
VHDL-1076 (VHSIC (Very High Speed Integrated Circuits) Hardware Describtion
Language) is an IEEE Standard scince 1987. It is "a formal notation intended
for use in all phases of the creation of electronic systems. ... it supports
the development, verification, synthesis, and testing of hardware designs,
the communication of hardware design data ..." [Preface to the IEEE Standard
VHDL Language Reference Manual] and especially the SIMULATION of hardware
descriptions. Additionally VHDL-models are a DoD requirement for vendors.

Today simulation systems and other tools (synthesis, verification and others)
based on VHDL are available. The VHDL users community is growing fast. 
Several international conferences organized by the VHDL Users Groups(s) have
been held with relevant interest. Other international conferences adress the
topic with growing interest as well (Conference on Hardware Description
Languages -CHDL-, [European] Design Automation Conference -[Euro]DAC ...).
More than one mailing list exists with lots of interest.
All answers agreed that there is a need for this group, from US to Moscov(!).

This group is a forum to discuss all problems related with the VHDL Language
and tools supporting VHDL. Important topics are (without restriction to
other ideas):
    Problems with the language [reference manual]. 
    VHDL validation suite and problems with it
    Books on VHDL
    Design example exchange. 
    Available tools, their features and problems. (compilers, simulation, 
        synthesis, verification ...)
    Coding conventions. 
    The varios groups and activities in/beside VHDL (WAVES, VASG...)
    Conferences on VHDL

An article will be posted periodically in this group, answering frequently
asked questions which did appear in the group. Thomas Dettmer (the author of
this CFV) is the volunteer for this job. Examples topics are:
   WHAT does VHDL, WAVES, ... mean 
   Where can I ftp ...
   Can someone give me a list of introduction books to VHDL
   and others (any help or ideas are welcome) 

WHY THE NEW GROUP:
There are currently a lot of tools based on VHDL. As far as I know, they are
all commercial, ranging fromm $500 (PC Version Simulator) to <unbounded>. A
lot of people are working on tools and more are using the available ones.
Some discussions in various groups and mailing lists prove that there is
growing interest and a lot of questions/problems have to be solved. There
will be enough worldwide (see above) traffic in the new group to justify the 
creation. A lot of other good reasons are available (thanks for all answers)
but we cannot list all of them here.

SCHEDULE:

VOTE
    The voting period begins on monday, november 26 and ends at december
    16th. All votes received during this period on one of the adresses given
    below are counted (once for each sender).

HOW TO VOTE
Your vote shoud be send by e-mail to:
     Thomas Dettmer
     dettmer@saturn.ls1.informatik.uni-dortmund.de
or
     Rachael Rusting
     rmr@inmet.inmet.com

Please put your vote in the subject of the mail-header. Format:
subject: YES comp.lang.vhdl        or
subject: NO comp.lang.vhdl        

Mail not following this format is possibly not counted, mail not containing
a clear yes or no, without any "but we should..." is definitly not counted.
Your mail MUST contain an email adress to contact you (no matter on what
kind of net) - this is to enable a verification of the results by other
netlanders. Votes posted to the net are not counted as well.

RESULTS
When the voting period is over, I have to wait 5 days. The results will be
published on the net (news.groups and news.announce.newgroups) and in the
info-vhdl mailing list. The publication contains a short summary and the
email adresses, names and votes of the voters. We need at least 100 more YES
than NO votes and 2/3 of the total of valid notes must be YES to create the
group. This will be done immediately after a positive result (hopefuly) has
been published. 

ADDITIONAL INFOS
This CFV was originally send to
news.announce.newgroups news.groups comp.lsi comp.lsi.cad comp.simulation
comp.compilers comp.arch
info-vhdl (mailing list)
some private email adresses

COPYRIGHT NOTICE (to answer this frequently asked question)

It is permitted and appreciated to translate, crosspost and/or republish
this article for free if 
1. the parts VOTE and HOW TO VOTE are left unchanged
2. the name and adress of the original author are included
3. changes are marked

Join us.
tom
-----------------------------------------------------------------------
email: dettmer@saturn.ls1.informatik.uni-dortmund.de
snail mail:                               phone: +49-231 755 4825
        Thomas Dettmer
    University of Dortmund                FAX: +49-231 75 15 32
Departement of Computer Science I
       Post Box 50 05 00
      D-4600 Dortmund 50
  Federal Republic of Germany (West)
-----------------------------------------------------------------------
email: dettmer@saturn.ls1.informatik.uni-dortmund.de
phone: +49-231 755 4825                FAX: +49-231 755 2386
snail mail: Thomas Dettmer, Dortmund University, Computer Science I
       Post Box 50 05 00, W-4600 Dortmund 50, Federal Republic of Germany

dettmer@jupiter.informatik.uni-dortmund.de (Thomas Dettmer) (11/26/90)

CALL FOR VOTES for "comp.lang.vhdl"

Please SEND YOUR VOTE BY E-MAIL during the voting period from november 26th
to december 16th, following the format defined at the end of this article.

NAME/GROUP: 
     comp.lang.vhdl

     VHDL is a COMPuter LANGuage. This is the appropriate place to put it
     in. (generally agreed in the discussion). There was some discussion
     about comp.lang.hdl[.*], but most of the answers I got agreed with
     comp.lang.vhdl. The only other interest mentioned more than once (3
     times) was edif. Because there's not much traffic about general HDL's,
     they can further be discussed in comp.lang.lsi.

STATUS: 
    unmoderated

    was agreed by all answers until today (see below).

CHARTER:
VHDL-1076 (VHSIC (Very High Speed Integrated Circuits) Hardware Describtion
Language) is an IEEE Standard scince 1987. It is "a formal notation intended
for use in all phases of the creation of electronic systems. ... it supports
the development, verification, synthesis, and testing of hardware designs,
the communication of hardware design data ..." [Preface to the IEEE Standard
VHDL Language Reference Manual] and especially the SIMULATION of hardware
descriptions. Additionally VHDL-models are a DoD requirement for vendors.

Today simulation systems and other tools (synthesis, verification and others)
based on VHDL are available. The VHDL users community is growing fast. 
Several international conferences organized by the VHDL Users Groups(s) have
been held with relevant interest. Other international conferences adress the
topic with growing interest as well (Conference on Hardware Description
Languages -CHDL-, [European] Design Automation Conference -[Euro]DAC ...).
More than one mailing list exists with lots of interest.
All answers agreed that there is a need for this group, from US to Moscov(!).

This group is a forum to discuss all problems related with the VHDL Language
and tools supporting VHDL. Important topics are (without restriction to
other ideas):
    Problems with the language [reference manual]. 
    VHDL validation suite and problems with it
    Books on VHDL
    Design example exchange. 
    Available tools, their features and problems. (compilers, simulation, 
        synthesis, verification ...)
    Coding conventions. 
    The varios groups and activities in/beside VHDL (WAVES, VASG...)
    Conferences on VHDL

An article will be posted periodically in this group, answering frequently
asked questions which did appear in the group. Thomas Dettmer (the author of
this CFV) is the volunteer for this job. Examples topics are:
   WHAT does VHDL, WAVES, ... mean 
   Where can I ftp ...
   Can someone give me a list of introduction books to VHDL
   and others (any help or ideas are welcome) 

WHY THE NEW GROUP:
There are currently a lot of tools based on VHDL. As far as I know, they are
all commercial, ranging fromm $500 (PC Version Simulator) to <unbounded>. A
lot of people are working on tools and more are using the available ones.
Some discussions in various groups and mailing lists prove that there is
growing interest and a lot of questions/problems have to be solved. There
will be enough worldwide (see above) traffic in the new group to justify the 
creation. A lot of other good reasons are available (thanks for all answers)
but we cannot list all of them here.

SCHEDULE:

VOTE
    The voting period begins on monday, november 26 and ends at december
    16th. All votes received during this period on one of the adresses given
    below are counted (once for each sender).

HOW TO VOTE
Your vote shoud be send by e-mail to:
     Thomas Dettmer
     dettmer@saturn.ls1.informatik.uni-dortmund.de
or
     Rachael Rusting
     rmr@inmet.inmet.com

Please put your vote in the subject of the mail-header. Format:
subject: YES comp.lang.vhdl        or
subject: NO comp.lang.vhdl        

Mail not following this format is possibly not counted, mail not containing
a clear yes or no, without any "but we should..." is definitly not counted.
Your mail MUST contain an email adress to contact you (no matter on what
kind of net) - this is to enable a verification of the results by other
netlanders. Votes posted to the net are not counted as well.

RESULTS
When the voting period is over, I have to wait 5 days. The results will be
published on the net (news.groups and news.announce.newgroups) and in the
info-vhdl mailing list. The publication contains a short summary and the
email adresses, names and votes of the voters. We need at least 100 more YES
than NO votes and 2/3 of the total of valid notes must be YES to create the
group. This will be done immediately after a positive result (hopefuly) has
been published. 

ADDITIONAL INFOS
This CFV was originally send to
news.announce.newgroups news.groups comp.lsi comp.lsi.cad comp.simulation
comp.compilers comp.arch
info-vhdl (mailing list)
some private email adresses

COPYRIGHT NOTICE (to answer this frequently asked question)

It is permitted and appreciated to translate, crosspost and/or republish
this article for free if 
1. the parts VOTE and HOW TO VOTE are left unchanged
2. the name and adress of the original author are included
3. changes are marked

Join us.
tom
-----------------------------------------------------------------------
email: dettmer@saturn.ls1.informatik.uni-dortmund.de
phone: +49-231 755 4825                FAX: +49-231 755 2386
snail mail: Thomas Dettmer, Dortmund University, Computer Science I
       Post Box 50 05 00, W-4600 Dortmund 50, Federal Republic of Germany
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