U.N.Owen@hsv3.UUCP (U.N.Owen) (12/18/90)
Hi folks, (I hope this is the right group for this question...) Anyone know of a way to convert verilog simulations into LSI ASIC test vector files (TPT and SCL)? Please email... Thanks -- ...ames!vsi1!v7fs1!U.N.Owen **** Aunt Agatha Where are you ? :-) ********