pak@saturn.ucsc.edu (Pak K. Chan) (02/06/91)
INTERNATIONAL WORKSHOP on FIELD PROGRAMMABLE LOGIC and APPLICATIONS
4 - 6 September, 1991
Oxford University, UK
AIM
The aim of this workshop is to bring together workers from
throughout the world for a wide ranging discussion of all
forms of field programmable logic (but particularly
field programmable gate arrays) and their applications.
It is intended to discuss the increasing range of device types,
industrial applications, advanced CAD developments,
research applications, novel systems architectures
and educational experiences. The workshop will include
regular presentations, short presentations, demonstrations,
posters and discussion sessions and it is expected that
most of the delegates will wish to make some contribution
to one or more of these. To encourage interaction,
the workshop will be limited to a maximum of 90 participants.
SCOPE
Field Programmable Logic has been available for a number
of years, but the increasing power and variety of
devices now available is extending its role from that of
simply being a convenient way of implementing the system
'glue logic' to an increasing ability to implement
mainstream system functions. The speed with which
devices can be programmed makes them ideal for
prototyping and for education, the reprogrammable
devices are opening up sophisticated new applications
and new hardware/software trade-offs. CAD is being
developed for automatic compilation of advanced designs
and routes to custom circuits are now available.
The scope of the workshop includes, but need not be
limited to, the following aspects of field programmable logic:
o New and future commercial devices
o Novel chip architectures
o New software and hardware development products
o Bridges to other CAD and to custom circuits
o High-level design and compilation research
o Industrial applications and experiences
o Trade-offs between devices, architectures and
technologies; benchmark comparisons
o Smart applications
o Novel machine paradigms and system architectures
o ASIC emulators, hardware modellers and compiled accelerators
o Fault models, testability methods, reliability
o Educational experiences
CALL FOR CONTRIBUTIONS
Contributions are invited for regular presentation,
short presentation, poster and discussion sessions.
Prospective authors are invited to submit a 500 word
abstract by 28th March, 1991. Please preface this by
your full correspondence address including email and
fax, a list of (at most) 5 one-line statements that best
encapsulate the essence of your proposed contribution,
and a note of your preferred presentation format. (If
possible, please mail 10 copies, but submissions by
email or fax will be accepted).
Notification of acceptance will be posted by 10th May
and full papers (5 to 12 pages, single line spacing)
must be received by 15th August to guarantee
distribution at the workshop. Selected contributors
will be invited to submit their papers to be included in
an edited proceedings to be published in book form in
early 1992.
LOCAL DETAILS
The workshop will be held at the University of Oxford on
the 4th-6th September 1991 with meals and accommodation
available in 16th century Jesus College on the nights of
3rd-5th September. The cost of the workshop inclusive
of proceedings, lunches and banquet will be 285 pounds, with
full board and accommodation it will be 375 pounds.
The University and its Colleges are located in the
centre of this historic city which has fast connections
to London and its airports. Oxford and the surrounding
area has numerous cultural and tourist attractions and
has plenty to interest accompanying partners.
PROGRAMME COMMITTEE
Martin Bolton, SGS-Thomson Microelectronics, UK
Pak K. Chan, University of California at Santa Cruz, USA
Keith Dimond, University of Kent, UK
Patrick Foulk, Heriot-Watt University, UK
Abbas El Gamal, Stanford University, USA
John Gray, Algotronix, UK
Reiner Hartenstein, Kaiserslautern University, Germany
Dwight Hill, AT&T Bell Labs, USA
Ian Jones, Apple Computer, USA
Wayne Luk, Oxford University, UK
Liam Marnane, University of Wales (Bangor), UK
Will Moore, Oxford University, UK
Peter Noakes, University of Essex, UK
John Oldfield, Syracuse University, USA
Eros Pasero, Politechnico di Torino, Italy
Richard Ravel, Xilinx, USA
Jonathan Rose, University of Toronto, Canada
Mike Smith, University of Hawaii, USA
FURTHER DETAILS FROM:
Ms. Anna Morris
Field Programmable Logic Workshop Secretary,
CPD Unit, Department for Continuing Education,
University of Oxford, Rewley House,
1 Wellington Square,
OXFORD OX1 2JA, England.
Tel.: +44 865 270360 Fax: +44 865 270708
e-mail: cpdmail@vax.ox.ac.uk
or
Dr. Will Moore,
Department of Engineering Science,
University of Oxford,
Parks Road, OXFORD, OX1 3PJ, England.
Tel.: +44 865 273187 Fax: +44 865 273010
e-mail: moore@vax.ox.ac.uk
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ps. I post the above message on behalf of Dr. Will Moore