sllu@jenny.isi.edu (Shih-Lien Lu) (02/15/91)
In article <1991Feb14.103845.20434@news.iastate.edu> mpurtell@iastate.edu (Purtell Michael J) writes: >I was curious what it would cost, approximately, to have 100 or 500 >MOSIS tiny chips (40 pin ceramic package) manufactured. >This would be assuming that a few chips had already been run so that the >masks had alread been made. >Thanks! I assume you have made a few 2um TinyChips thru MOSIS. The bad news is that you have to make the masks again most likely. The masks your project is on also have about fifty other designs. I believe MOSIS put a TinyChip design on 2 sites each wafer (2um). If you do not make a new masks set, to get 100 parts you need 50 wafers. To get 500 parts you need 250 wafers. Assume wafers are ~$1K a piece, that adds up to $50K or $250K for 100 and 500 parts respectively. Of course the price per wafer depends on the total number of wafers fabricated. So I think the numbers are $50K and $150K for 100 and 500 parts respectively ($600 per wafer instead of $1K when you order 500 wafers). This way you also end up with many other designs besides yours. (It would be nice if everyone wants to have 100-500 parts) To make a new set of masks will cost you ~$25K (you may get it with $20K). I believe you need to buy at least 5 wafers from a fabricator at >$2K a wafer (since you are buying only 5 wafers instead of 100 wafers). I would think you need at least $35K to get the additional 100 parts. That translates to $350 per part!!! Compare this $$$ with packaging cost! Wow! Now there are other ways around this "small volume production" problem. MOSIS could increase the number of sites on a wafer for your design. (Please call MOSIS up to arrange it) You can also do it yourself by putting multiple copies of your design into one larger size of project. I believe you can get the price per part down to ~$25. Hope this help. Shih-Lien Disclaimer:: "I speak for myself only."
roy@mcnc.org (Subhash Chandra Roy) (02/15/91)
|I just toured our Microelectronics Research Center(ISU) yesterday and |was shown a mask for a chip. The mask only had one chip on it; not a whole |wafer's worth of replicates. Is this just the way it's done in a research |environment? |-- | Michael Purtell ---- mpurtell@iastate.edu |Iowa State University ---- Birthplace of the first electronic digital computer | "In a hundread years, we'll all be dead." -- The January Man | "slow is real" Below 1.2u you need to step across a wafer with an image instead of a single image for the whole wafer. Subhash Roy roy@mcnc.org
sss@ole.UUCP (Stephen Sugiyama) (02/17/91)
In article <1991Feb15.115859.8285@news.iastate.edu> mpurtell@iastate.edu (Purtell Michael J) writes: > I just toured our Microelectronics Research Center(ISU) yesterday and > was shown a mask for a chip. The mask only had one chip on it; not a whole > wafer's worth of replicates. Is this just the way it's done in a research > environment? > -- > Michael Purtell ---- mpurtell@iastate.edu You probably saw a reticle for a stepper. Both full-wafer (1:1) projection masks and reduction step-and-repeat projection reticles (usually 5X) are common in optical lithography. Stepping is becoming more prevalent since the resolution can be greater, larger wafers can be imaged, and there is a slightly higher tolerance to mask defects, at a cost of slower throughput. Sometimes both systems are used in a process for different projection steps. -- Stephen Sugiyama ole!sss@sumax.seattleu.edu