[comp.lsi] SPICE parameters for a typical DRAM process?

lethin@ai.mit.edu (Richard A. Lethin) (03/20/91)

I'd like to examine the SPICE parameters for a typical DRAM process.
Would someone be able to mail them to me, or point me in the right
direction to find such ?

Spice parameters for other processes: BIPOLAR, BICMOS, SRAM, EPROM,
EEPROM, and comparable LOGIC would also be good.  Are there any good
references that discuss the differences?