chiaraviglio@husc2.UUCP (lucius) (11/17/86)
_ Has anyone heard of anybody working on a microprocessor with an internal data-width of more than 32 bits? I think we are going to be due for another internal data-width and address-width upgrade in a few years, as people move more number-crunching and very large applications onto microprocessor-based systems. Also, increasing the external bus width would (in conjunction with pipelining/instruction-stream-caching) help alleviate the problem of processors being considerably faster than memory. However, I have not heard of any internal or external data- or address- width increases in the works. -- -- Lucius Chiaraviglio chiaraviglio@husc4.harvard.edu seismo!husc4!chiaraviglio Please do not mail replies to me on husc2 (disk quota problems, and broken mail system won't let me send mail out). Please send only to the address given above, until tardis.harvard.edu is revived.
eugene@nike.uucp (Eugene Miya N.) (11/18/86)
> Has anyone heard of anybody working on a microprocessor with an >internal data-width of more than 32 bits? . . . >people move more number-crunching and very large applications onto >microprocessor-based systems. Also, increasing the external bus width would > -- Lucius Chiaraviglio > chiaraviglio@husc4.harvard.edu > seismo!husc4!chiaraviglio This was a question I posed to the net some time ago. I was surprised at the number of skeptical opinions including one fellow who had a hand in designing the MC68000 family. I know of at least one 64-bit microprocessor in design in Japan. I don't know much about it, Lucius. I decided to post a followup rather than send mail because I have a similar question: does anyone on the net know anything about a chip by Hitachi with the designation of H16? It's my understanding the H16 has a vector instruction set complete with chaining, and a vector/cache like an H-810/20 super computer or a Fujitsu VP-200/Amdahl-1200, except that it's a 16-bit micro. Not 64-bits, it it sounds impressive just the same. I would appreciate details. From the Rock of Ages Home for Retired Hackers: --eugene miya NASA Ames Research Center eugene@ames-nas.ARPA "You trust the `reply' command with all those different mailers out there?" {hplabs,hao,nike,ihnp4,decwrl,allegra,tektronix,menlo70}!ames!aurora!eugene
rb@cci632.UUCP (Rex Ballard) (11/18/86)
In article <1030@husc2.UUCP> chiaraviglio@husc2.UUCP (lucius) writes: >_ > Has anyone heard of anybody working on a microprocessor with an >internal data-width of more than 32 bits? I think we are going to be due for >another internal data-width and address-width upgrade in a few years, as >people move more number-crunching and very large applications onto >microprocessor-based systems. There seem to be different reasons, but in general the trade-offs between a 64 bit machine and other design alternatives seems to go against the wider external data paths. Most mini makers have chosen to hide or expose additional processing power in terms of coprocessors or dedicated front-end peripheral processors. Addition of FPU's, LAN controllers, and even tty "panels" often do more to upgrade the final result than does a wider backplane. While it is possible that someone may come out with wider path processors of special dedicated applications, most will probably work with more efficient archetectures for inter-processor communications. >Also, increasing the external bus width would >(in conjunction with pipelining/instruction-stream-caching) help alleviate the >problem of processors being considerably faster than memory. These problems are legitimate reasons to widen data paths, but they are also legitimate reasons for alternative connectivity, such as loosely coupled systems, transaction processing, and processor networks. >However, I have >not heard of any internal or external data- or address- width increases in the >works. There are a few rumors of variable width internal increases, some as much as 512 bits, but almost nothing happening in terms of external increases. I'm not so near sighted as to think we will never need more than 32 bits, but even with optical storage, more than 4 gigabytes of "demand paged memory" will probably be addressed with those "yukky kludges" like segmentation before they are addressed with a doubling of address bits. There is a good possibility that with new archetectures like the transputer beginning to gain acceptance, we may start looking at networks of 100 processors or more with as little as 2k/processor and seldom more than 1 meg per processor. Some of these processors may be little more than "smart dma" processors, with a little bit of programmability, others may be full blown vaxen on just a few chips. The difficulty will most likely be in trying to determine how to distribute these resources effectively. > -- Lucius Chiaraviglio Rex Ballard.
michaelm@bcsaic.UUCP (Michael Maxwell) (11/18/86)
In article <1030@husc2.UUCP> chiaraviglio@husc2.UUCP (lucius) writes: >_ > Has anyone heard of anybody working on a microprocessor with an >internal data-width of more than 32 bits? A couple years ago, some people at the Academic Computing Center of the University of Washington were playing with the idea of a microprocessor which would emulate a Cyber 170, which is a 60-bit machine. I am not certain whether the microprocessor would actually have had 60 bits internally, or whether this might have been emulated (by stringing together registers, for instance). Nor do I know what became of this project. Anyone at UW know? -- Mike Maxwell Boeing Advanced Technology Center ...uw-beaver!uw-june!bcsaic!michaelm
billw@navajo.STANFORD.EDU (William E. Westfield) (11/20/86)
How about a 36 bit processor with a DEC-20 architecture on a chip or two? To sell in systems with 1 MW of memory for $5-10K ? The original DEC 36 bit machine (the PDP6_ only had about 3000 gates, it ought to be a piece of cake... It'd be so nice..... Sigh... "TOAD" means "Twenty On A Desk" BillW