u5@mit-eddie.UUCP (02/28/87)
I have to write a term paper for an undergraduate class in Computer Architectures. I think I want to do it on the evolution of memory management schemes on micros. e.g. no "management" on 4004's, to the page 0 and bank switching used in Apple ][s, to the 68020 and 80386 architectures. I would appreciate any references you could provide, especially on articles which explained why systems were designed the way they were. Please send replies to me, and I will summerize. thank you, u5
ram@nucsrl.UUCP (03/08/87)
Since mail to u5 bounced I am posting this:
Read the latest issue of "COMPUTER". Article by Milutinovic & ....
(I forget the name of the other author) have written an excellent
article on MMU for micros. That article alone should be enough
to suggest pointers for other articles on MMUs.
renu raman
..ihnp4!nucsrl!ram
What's wrong with Reagan's Memory(MMU)?
Something screwed up in BANK SWITCHING.mash@mips.UUCP (John Mashey) (03/15/87)
In article <3810017@nucsrl.UUCP> ram@nucsrl.UUCP (Raman Renu) writes: > Read the latest issue of "COMPUTER". Article by Milutinovic & .... > (I forget the name of the other author) have written an excellent > article on MMU for micros. That article alone should be enough > to suggest pointers for other articles on MMUs. The article is "A Survey of Microprocessor Architectures for Memory Management", by Furht & Milutinovic, COMPUTER 20, 3(March 87), 48-67. This is a clearly-written article that seems a worthwhile tutorial for someone new to this topic. However, be aware of a few caveats: a) The article appears a bit old: the latest reference cited is from mid-1984, hence if you're looking for a survey of the current state of the world, rather than a tutorial, this isn't the article. I'm not sure why, since COMPUTER generally has pretty short submission-publication timelags. b) Thus, there is no mention of things like: IBM PC/RT: ROMP + Rosetta (inverse mapping) Clipper: CAMMU combined cache/TLB chips MIPS R2000: onchip TLB with software refill & software-defined page-map organizations (Note that all of the above are actual commercial products). c) As a result of when the article was apparently written, some of what's said, although accurate (as far as I know), could easily mislead people as to the reality level of things being discussed. For example, a fair amount of the discussion revolves around the Intel i432 and Zilog Z80,000, in the same vein as discussions of 286's, 68Ks, etc. One would also expect from the article that most virtual 68K systems would use the corresponding MMUs, rather than the SRAM-based maps found in many of them [Suns, for example]. d) In general, there is plenty of of factual information in the article, but little real-world evaluation, which is something one would like to be call something an excellent survey. There is a class of article that I'd call a "data-sheet" article, i.e., it passes on what is found in data-sheets, speaking of things that don't yet exist, may never exist, or may sort-of exist but don't really work very well. You sometime see all sorts of unevaluated comments passed along as gospel. Anyway, the cited article is much better than that, although it does clearly fall into the "X is..." trap on occasion. To summarize: a useful tutorial, but hardly an excellent survey of the current state of the art. -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mash, DDD: 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086