top@tub.UUCP (04/11/87)
I have a question for all 68020-insiders: How many external bus accesses does a 68020 make running such loop: LOOP: bra LOOP Our MC68020 did following: One (1) cache cycle, One (1) external bus cycle. Do *YOU* know why ? I forgot: "program" address was 0x300000, we found it using an Oscilloscope (no software-timing-guesses). If you have any ideas just let me know. If you respond in E-mail, you may answer in German (if you wish ;-) Thanks! Thomas Patzelt, Gesellschaft fuer Mathematik und Datenverarbeitung (GMD) Technical University of Berlin (W-Germany). ...seismo!unido!tub!top