[comp.arch] SUPERCOMPUTING CONFERENCE-ADVANCE P

cdp@uicsrd.UUCP (04/29/87)

                         ADVANCE PROGRAM
                         ---------------

            INTERNATIONAL CONFERENCE ON SUPERCOMPUTING
            ------------------------------------------

                 JUNE 8-12, 1987, ATHENS, GREECE

                      Ledra Marriott Hotel


                      MONDAY, JUNE 8, 1987
SESSION 1:  Opening Session
  9:00 - 9:30
                Welcoming Remarks:  T.S.  Papatheodorou,  Computer
                Technology Institute, GREECE
                Greek Government Official

 9:30 - 10:30
                Keynote  Address:  A  Supercomputing   Performance
                Evaluation Plan, David Kuck,
                Center    for    Supercomputing    Research    and
                Development, University of Illinois-Urbana, USA

10:30 - 11:00
                Coffee Break
SESSION 2:  Parallel Processing I
11:00 - 12:30
                Chairman:   T.S.  Papatheodorou,   University   of
                Patras, GREECE
                A  Perspective  on  Parallel   Processing,   Tilak
                Agerwala, IBM, USA
                Alliant   Computer   Systems:   Its    Background,
                Marketplace  and  Directions, Ron Gruner, Alliant,
                USA
 12:30 - 3:30
                LUNCH
SESSION 3:  Parallel Architectures

                Chairman:  Jacques Lenfant, University of  Rennes,
                FRANCE

  3:30 - 5:00
                Using Memory in the Cedar System, R.E. McGrath and
                Perry  Emrath,  Center for Supercomputing Research
                and Development,  University  of  Illinois-Urbana,
                USA
                Another  Combining  Scheme  to  Reduce  Hot   Spot
                Contention  in  Large Scale Shared Memory Parallel
                Computers, Gyungho Lee, The  Center  for  Advanced
                Computer   Studies,   University  of  Southwestern
                Louisiana, USA
                Applications  Environment  for  the  IBM  Research
                Parallel   Processor  Prototype  (RP3),  Frederica
                Darema, IBM, USA.

  5:00 - 5:30
                Coffee Break

  5:30 - 6:15
                On  the  SUPRENUM  Machine,  Ulrich   Trottenberg,
                Suprenum Gmbt, W. GERMANY

  6:15 - 7:30
                High Speed Interconnection Using the CLOS Network,
                W.A.  Payne  III,  Fillia Makedon and W.R. Daasch,
                AT&T and IIT, USA
                Multipath Hierarchies in Interconnection Networks,
                P.A. Franaszek and C.J. Georgiou, IBM, USA
                Performance   Analysis   of   the   Multi-Buffered
                Packet-Switching    Networks   in   Multiprocessor
                Systems, H. Yoon, K.Y. Lee and M.T. Liu, The  Ohio
                State University, USA










                      TUESDAY, JUNE 9, 1987

SESSION 4:  Parallel Processing II

                Chairman:   C.D.  Polychronopoulos,   Center   for
                Supercomputing     Research    and    Development,
                University of Illinois-Urbana, USA
 8:30 - 10:30
                Advanced Environments for Parallel Programming  in
                FORTRAN, Ken Kennedy, Rice University, USA
                Pipelining in Multiprocessor Environments, Jacques
                Lenfant, University of Rennes, FRANCE

10:30 - 11:00
                Coffee Break
SESSION 5:  Software Environments for Parallel Machines

                Chairman:  P. Gaffney, IBM, Norway

11:00 - 12:30
                Design and Rationale for  MUPPET:   A  Programming
                Environment  for Message Based Multiprocessors, H.
                Muhlenbein, O. Kramer, F. Limburger, M.  Mevenkamp
                and  S.  Streiz,  Gesellschaff  fur Mathematik und
                Datenverarbeitung, W. GERMANY


                An Overview  of  the  PTRAN  Analysis  System  for
                Multiprocessing,  F.  Allen, M. Burke, P. Charles,
                R. Cytron and J. Ferrante, IBM, USA


                Tools  for  Performance  Evaluation  of   Parallel
                Machines,  A.P.W.  Bohm, University of Manchester,
                UK

 12:30 - 3:30
                LUNCH
SESSION 6A:  Compilers and Restructuring Techniques

                Chairman:  G. Paul, IBM, USA,

  3:30 - 4:20
                Cache   Management,   Dennis    Gannon,    Indiana
                University, USA

  4:30 - 6:00
                Advanced  Compiler  Optimizations   for   Parallel
                Computers, Constantine D. Polychronopoulos, Center
                for  Supercomputing  Research   and   Development,
                University of Illinois-Urbana, USA
                MIMD - Parallelization for SUPRENUM, M. Gerndt and
                H.P. Zima, University of Bonn, W. GERMANY
                Loop  Quantization:   Unwinding   for   Fine-Grain
                Parallelism   Exploitation,  A.  Nicolau,  Cornell
                University, USA

   6:00 -6:30
                Coffee Break

  6:30 - 7:30
                Loop Optimization  vs.  Vectorization,  M.  Wolfe,
                Kuck and Associates, Inc., USA
                The Performance of Software-managed Multiprocessor
                Caches  on  Parallel Numerical Programs, H. Cheong
                and  A.V.  Veidenbaum,  Center  of  Supercomputing
                Research  and Development, University of Illinois-
                Urbana, USA
SESSION 6B:  Compilers and Restructuring Techniques

                Chairman:  Jacques Lenfant, University of  Rennes,
                FRANCE





  4:30 - 6:00
                Realization of a  Knowledge-Based  Parallelization
                Tool  in a Programming Environment, T. Brandes and
                M. Sommer, University of Marburg, W. GERMANY
                Incremental Performance Contributions of  Hardware
                Concurrency   Extraction   Techniques,  A.K.  Uht,
                University of California, San Diego, USA
                Access  Patterns  a  Useful  Concept   in   Vector
                Programming, Yvon Jegou, IRISA/INRIA, FRANCE

  6:00 - 6:30
                Coffee break

  6:30 - 7:00
                Scheduling Loops  on  Processors:  Algorithms  and
                Complexity,  A.A.  Munshi  and  B. Simons, Vitesse
                Electronics and IBM, USA
                Management of PDE Software for Supercomputing,  J.
                Fr. Hake, KFA Juelich/ZAM, W. GERMANY
















































                    WEDNESDAY, JUNE 10, 1987

SESSION 7:  Parallel Processing III

                Chairman:  E.N.  Houstis,  Purdue  University  and
                University of Thessaloniki, USA - GREECE
  8:30 - 9:20
                Supercomputing About Physical Objects, J.R.  Rice,
                Purdue University, USA

 9:20 - 10:10
                Algorithm   Design    for    Different    Computer
                Architectures, Jack Dongara, Argonne Laboratories,
                USA

10:10 - 10:30
                Coffee Break
SESSION 8A:  Problem Mapping and Scheduling

               Chairman:  J.R. Rice, Purdue University, USA
10:30 - 1:00
               Mapping  Finite  Element  Graphs  onto   Processor
               Meshes,  P.  Sadayappan and Fikret Ercal, The Ohio
               State University, USA

               A Parallel  Graph  Partitioning  Algorithm  for  a
               Message-Passing  Multiprocessor,  J.R. Gilbert and
               Earl Zmijewski, Cornell University, USA

               Mapping of Applications to Multiple Bus and Banyan
               Interconnected  Multiprocessor  Systems:   A  Case
               Study,  C.E.   Houstis  and  M.  Aboelaze,  Purdue
               University, USA

               Communication and Control Costs on Loosely Coupled
               Multiprocessors,  L. Brochard, Ecole Nationale des
               Ports et Chaussees, FRANCE

               Half-Dynamic Scheduling with Data-flow Control, H.
               Sunahara and M. Tokoro, Keio University, JAPAN
SESSION 8B:  Parallel Methods

               Chairman:  J. Dongara, Argonne Labs, USA
10:30 - 1:00
               A Parallel Blcok Cyclic  Reduction  Algorithm  for
               the   Fast  Solution  of  Elliptic  Equations,  E.
               Gallopoulos and Y. Saad, Center for Supercomputing
               Research  and Development, University of Illinois-
               Urbana, USA

               A  Parallel  Algorithm   for   the   General   LU-
               Factorization, D.  Kincaid and T. Oppe, University
               of Texas at Austin, USA

               The Solution of Non-linear Parabolic PDEs on  MIMD
               Parallel  Systems,  M.P.  Bekakos  and D.J. Evans,
               Loughborough University of Technology, UK

               Parallel Systolic  LU  Factorization  for  Simplex
               Updates,    K.    Margaritis   and   D.J.   Evans,
               Loughborough University of Technology, UK

               Basic Linear Algebra Computations  on  the  Sperry
               ISP,  J. Du Croz and Jerry Wasniewski, NAG Limited
               and UNI*C, UK and DENMARK
NO AFTERNOON SESSIONS











                     THURSDAY, JUNE 11, 1987

SESSION 9:  Parallel Processing IV

                Chairman:  David Kuck, Center  for  Supercomputing
                Research  and  Development University of Illinois-
                Urbana, USA
  8:30 - 9:20
                Basic Technology Development  for  Supercomputers,
                Steve Chen,
                Cray Research, USA
 9:20 - 10:10
                The Future of Scientific Programming  on  Parallel
                Machines, Arvind, MIT, USA
10:10 - 10:30
                Coffee Break
SESSION 9A:  VLSI, Dataflow and Array Processors

                Chairman:   Paul  Spirakis,  Computer   Technology
                Institute, GREECE
10:30 - 12:30
                Exploiting   Fine-Grain   Parallelism   in   Array
                Computation  on  a  Static Dataflow Supercomputer,
                G.R. Gao, MIT, USA

                Large Scale  Unification  Using  a  Mesh-Connected
                Array  of Hardware Unifiers, Yi-fong Shih and K.B.
                Irani, University of Michigan, USA

                A   Systolic   Array    Structure    for    Matrix
                Multiplication  in the Residue Number System, C.A.
                Papachristou and S. Hwang,  Case  Western  Reserve
                University, USA

                VLSI Arrays with Reconfigurable Buses,  D.  Reisis
                and  V.K.   Prasanna Kumar, University of Southern
                California, USA
                A  Wavefront  Array   Processor   using   Dataflow
                Processing  Elements, J.A. Vlontzos and S.Y. Kung,
                University of Southern California, USA
SESSION 9B:  Algorithms, Architectures and Performance

                Chairman:  I. Duff, Laboratory, UK
10:30 - 12:30
                Finite Element  Methods  on  Parallel  and  Vector
                Computers:  Application  in  Fluids  Dynamics,  J.
                Erhel, INRIA, FRANCE

                LU Factorization with Maximum Performances on  FPS
                Architectures 38/64 BIT, A. Corana, C. Martini, M.
                Morando, S. Ridella  and  C.   Ralando,  Consiglio
                Nazionale Delle Ricerche, ITALY

                MSC/NASTRAN   on   AMDAHL    Vector    Processors;
                Adaptation  and  Performance,  C.Y.  Chen,  AMDAHL
                Corporation, USA

                Gaussian   Elimination    on    Message    Passing
                Architectures,  M.   Gosnard,  B. Tourcheau and G.
                Villard,  National  Polytechnique   Institute   of
                Grenoble, FRANCE

                Implementing Codes on  a  SIMD/SPMD  Architecture:
                Application  to  a  Subset of EISPACK, B. Philippe
                and M. Raphalen, IRISA/INRIA, FRANCE
  12:30- 3:30
                LUNCH








SESSION 10A:  Algorithms, Architectures and Performance

                Chairman:  J. Dongarra, Argonne Laboratories, USA

  3:30 - 4:20
                Major Research Activities in  Parallel  Processing
                in Japan, Yoichi Muraoka, Waseda University, JAPAN

  4:30 - 5:45
                A  High  Resolution  Parallel  Legendre  Transform
                Algorithm,  D.F.  Snelling,  European  Centre  for
                Medium Range Weather Forecasts, UK
                Parallelization of a  Reservoir  Simulator,  Terje
                Karstad,   Adolfo   Henriquez,  Statoil  and  Knut
                Korsell, IBM
                Computer Graphisc Rendering Algorithm for Use on a
                SIMD  Machine,  S.  Whitman  and S. Dyer, The Ohio
                State University, USA

  5:45 - 6:15
                Coffee Break

  6:15 - 7:30
                Benchmark of the  Extended  Basic  Linear  Algebra
                Subprograms  on  the  NEC SX-2 Supercomputer, R.M.
                Dubach, J.L. Fredin and O.G. Johnson, Houston Area
                Research Center and University of Houston, USA
                Least-Squares Iterative Solution on  a  Fixed-Size
                VLSI   Architecture  E.P.  Papadopoulou  and  T.S.
                Papatheodorou, Clarkson  University  and  Computer
                Technology Institute, USA and GREECE
                CORDIC Based Concurrent  Algorithm  and  Pipelined
                Architecture  for Solving Linear System Equations,
                I.  Chang  Jou  and  Croy   Tseng,   Ministry   of
                Communications  and  National  Central University,
                TAIWAN
SESSION 10B:  Algorithms, Architectures and Performance

                Chairman:   T.S.  Papatheodorou,   University   of
                Patras, GREECE

  4:30 - 6:45
                Fast Parallel Algorithms for Processing of  Joins,
                D. Shasha and Paul Spirakis, Courant Institute USA
                and Computer Technology Institute, GREECE
                Performance Analysis for a Join Processor, G.  Liu
                and  H.  Chen,  Tatung  Institute  of  Technology,
                TAIWAN
                Parallel Algorithms for Parenthesis  Matching  and
                Generation   of   Random   Balanced  Sequences  of
                Parentheses, D. Sarkar and N. Deo,  University  of
                Central Florida, USA

  5:45 - 6:15
                Coffee Break

  6:15 - 7:30
                Superlinear Speedup for Parallel Backtracking,  B.
                Monien,   E.   Speckenmeyer   and  O.  Vornberger,
                Universitat - G.H. Paderborn, W. GERMANY
                On the Processing Time of a Parallel Linear System
                Solver,  A.  Stafylopatis  and A. Drigas, National
                Technical University of Athens, GREECE.
                Parallel Matrix Factorizations on a Shared  Memory
                MIMD  Computer,  N.M.  Missirlis  and F. Tjaferis,
                University of Athens, GREECE





                      FRIDAY, JUNE 12, 1987

SESSION 12:  Parallel Processing V

                Chairman:   D.  Maritsas,  University  of  Patras,
                GREECE

 8:30 - 10:00
                A Survey of Supercomputing in Europe,  Iain  Duff,
                Harwell Laboratory, UK
                Supercomputing on  the  Hypercube,  Geoffrey  Fox,
                Caltech, USA

10:00 - 10:30
                Coffee break

10:30 - 12:00
                Parallel  Logic  Machines,  Doug  DeGroot,   Texas
                Instruments, USA
                Parallel Evaluation of Simple Logic  Programs,  C.
                Papadimitriou, Stanford University, USA