[comp.arch] Fun addressing modes

mouse@mcgill-vision.UUCP (05/15/87)

In article <787@killer.UUCP>, jfh@killer.UUCP (John Haugh) writes:
> DEC has been doing things the *right* way since the early 70's with
> the PDP-11 and later with the Vax.  JSR on a PDP-11 saves the return
> address in a register.  JSR on a Vax

There are three analogs, called BSBB, BSBW, and JSB.  You probably mean
JSB; it's the closest to the PDP-11 version.

> (same for a PDP-11, but the Vax has more and harder to figure out
> modes :-) takes a dozen or so addressing modes (the illegal ones are
> the most fun (what does JSR (R15) _really_ do?)

Using the PC in vanilla (non-auto-increment) register deferred is not
good.  From the Architecture Reference Manual:

	PC may not be used in register deferred mode addressing.  If it
	is, [the operand (and what happens to it)] is UNPREDICTABLE.

> Trivia question - what does TSTW -(R15) do and is it legal?

	PC may not be used in autodecrement mode.  If it is, [the
	operand (and what happens to it)] is UNPREDICTABLE and the next
	instruction executed or the next operand specified is
	UNPREDICTABLE.

I actually tried the above two instructions.  One would think that the
TSTW would be an infinite loop (ie, DEC was just covering their rears
with the bit about UNPREDICTABLE), but no, it errors out immediately.
(So does the JSB, for that matter.)  Very boring.

					der Mouse

				(mouse@mcgill-vision.uucp)