eugene@pioneer.arpa (Eugene Miya N.) (08/05/87)
In article <214@vianet.UUCP> devine@vianet.UUCP (Bob Devine) writes: > Hillis' Connection Machines supposedly[*] have an implementation of >disk striping where there are 39 disks that each get one bit from >a word. The word is formed by 32 data bits and 7 ECC bits. Doing it >in this fashion allows complete recovery even if one disk gets hosed. The cabinet of that box appeared at the Santa Clara SuperC Convention in May. I was informed it was not yet hooked up. Technically this is not quite perceived as disk striping because its object is to have as many processing elements/disk combinations as possible. Striped systems are largely single CPU systems. The fact that some have four processors apparently deceives some users into believing they automatically get 4 CPUs working on their problems. Sorry, automatic parallelism is not quite all here yet (see the FX/x architectures for things which are partially automatic). Anyway, there is no term for what CM does. It was done on the ILLIAC. The database machine people might call it a "disk per PE" machine, but it was around before them, so I don't think there is any standard terminology. Suggestions? (Appeal to the community on what you call it.) Also, I think FPS T-Series Hypercubes are supposed to have the capability of 1 disk per node, but I have not seen one of thse yet, and we have an Intel. From the Rock of Ages Home for Retired Hackers: --eugene miya NASA Ames Research Center eugene@ames-aurora.ARPA "You trust the `reply' command with all those different mailers out there?" "Send mail, avoid follow-ups. If enough, I'll summarize." {hplabs,hao,ihnp4,decwrl,allegra,tektronix,menlo70}!ames!aurora!eugene
andy@batcomputer.tn.cornell.edu (Andy Pfiffer) (08/05/87)
In article <2438@ames.arpa> eugene@pioneer.UUCP (Eugene Miya N.) writes: >Also, I think FPS T-Series Hypercubes >are supposed to have the capability of 1 disk per node, but I have not >seen one of thse yet, and we have an Intel. >--eugene miya Actually, it is 1 disk (small SCSI) per 8 nodes. The smallest divisable unit of a T-Series (a T-10) consists of 8 vector boards (INMOS T414's with Weitek VPU's) and 1 system board (INMOS T414, no VPU, 2 UARTs and a disk) All nodes have 1 MB of memory. ...and in actuality, multiple modules (ie T-10's) are actually hooked up as rings of 3-cubes... Andy Pfiffer Trillium Development Staff -- Andy Pfiffer andy@tcgould.tn.cornell.edu Cornell Theory Center / Cornell U. cornell!batcomputer!andy Home of the first usable T-Series (607) 255-8686 "...that's the way a Transputer works, right?" Systems Group