sbw@naucse.UUCP (Steve Wampler) (08/28/87)
First, I'd like to thank the people who responded to my earlier
posting on this. I've tried to email them personally, but have
been unable to reach everyone.
Based upon the previous responses, I have a more specific
question set this time around.
Background:
The RISC I and RISC II chips are described in the papers I have
(both fairly old now) as having a collection of overlapping
register sets (This is what I meant when I used the term
'register file' before). Registers in a set are accessed ala
conventional register addressing and memory is accessed only
through LOAD/STORE instructions. However, the register sets
overlap so that many procedure parameters could be passed
via the overlap, thus avoiding memory references. Both the papers
I have state that, in order to provide the ability of taking
the address of these parameters (as well as local variables
that are placed into the register set), one is able to take
the address of a register. This address could then been used
in a LOAD/STORE instruction to fetch the contents of that
register (as if it had been in memory). Both papers say this
is implemented on RISC I and II by reserving part of the
address space for the register sets, and the papers also sketch
how the checks are made on a LOAD/STORE operation to quickly
determine whether or not the address is really in a register
set.
My questions:
One person who responded stated that one could not
take the address of a register on RISC I and II.
True? Since this differs from the papers I have,
would someone tell me why this was changed?
On machines with overlapping register sets (such
as RISC I and II), are register addresses allowed?
If not, then why not? If not, then how does this
affect the use of the overlap region to pass parameters?
If you are familiar with a machine with overlapping
register sets (such as RISC I, II or (I think) Pyramid)
and it *does* have the ability to compute a register's
address for use in LOAD/STORE instructions, just how
close to 'normal' memory addressing is it? (I.e. is
anything that is possible to do with a memory address
also possible to with a register address? If not, then
what are the differences?)
Sorry to be such a bother on this. It's a new area to me and I'm
trying to understand it better. Since I'm a novice, please try not
to send responses of the sort: "Well, I've heard that a XXX does
just that...", I'm looking for hard examples one way or the other
on machines that have overlapping register sets.
Thanks again.
Please email responses, I don't get comp.arch here.
Steve Wampler
{....!arizona!naucse!sbw}