mfreeman@cascade.STANFORD.EDU (Martin Freeman) (08/29/87)
SECOND INTERNATIONAL CONFERENCE ON
ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES
AND OPERATING SYSTEMS
(ASPLOS-II)
Palo Alto, California, October 5-8, 1987
Sponsored by ACM and Computer Society of the IEEE
CONFERENCE CHAIRMEN
General: Martin Freeman, Stanford University & Philips
Research Labs
Program: Randy Katz, U.C. Berkeley
Finance: Dennis Reinhardt, DAIR Computer Systems
Publicity: Jim Flournoy, Consultant
PROGRAM COMMITTEE
Randy Katz, U.C. Berkeley (chairman)
Forest Baskett, Silicon Graphics
David Ditzel, Sun Microsystems
James Goodman, U. of Wisconsin
John Hennessy, Stanford University
Edward McCreight, Xerox PARC
Steven Muchnick, Sun Microsystems
Richard Sites, DEC Hudson
Alan Smith, U.C. Berkeley
Chuck Thacker, DEC Systems Res. Center
Philip Treleaven, University College London
Mario Tokoro, Keio University
Monday, October 5
08:00-09:00 Tutorial Registration
09:00-12:00 Tutorial I: CACHE MEMORIES, Alan Smith, U.C. Berkeley
Survey of design considerations for cache memories
including recent material on cache workloads, cache
miss ratios, and cache consistency algorithms.
12:00-01:00 LUNCH
01:00-04:00 Tutorial II: RISC ARCHITECTURES: PRINCIPLES & EXAMPLES,
John Hennessy, Stanford University
Survey of the principles behind the RISC approach using
research and commercial machines to illustrate design
tradeoffs.
Tuesday, October 6
08:00-09:00 Conference Registration
09:00-10:00 KEYNOTE SPEAKER: Niklaus Wirth, ETH
"Hardware Architectures for Programming Languages, and
Programming Languages for Hardware Architectures"
10:00-10:30 BREAK
10:30-12:00 SESSION I: OPERATING SYSTEMS, Chair: Forest Baskett,
Silicon Graphics
"VLSI Assist in Building a Multiprocessor Operating
System," B. Beck, B. Kasten, S. Thakkar, Sequent
Computer Systems
"Architectural Support for Multilanguage Parallel
Programming on Heterogeneous Systems," R. Bisiani,
A. Forin, Carnegie-Mellon University
"Machine-Independent Virtual Memory Management for
Paged Uniprocessor and Multiprocessor Architectures,"
R. Rashid, A. Tevanian, M. Young, D. Golub, R. Baron,
D. Black, W. Bolosky, J. Chew, Carnegie-Mellon
University
12:00-01:00 LUNCH
01:00-03:10 SESSION II: LANGUAGES AND INSTRUCTION SETS, Chair:
Chuck Thacker, DEC Systems Research Lab
"An Architecture for the Direct Execution of the
FORTH Programming Language," J. Hayes, M. Fraeman,
R. Williams, T. Zaremba, The Johns Hopkins University
Applied Physics Lab
"Tags and Type Checking in LISP: Hardware and Software
Approaches," P. Steenkiste, J. Hennessy, Stanford
University
"The Effect of Instruction Set Complexity on Program
Size and Memory Performance," J. Davidson, R. Vaughn,
U. of Virginia
"The DRAGON Processor," R. Atkinson, E. McCreight,
Xerox PARC
03:10-03:40 BREAK
03:40-05:00 SESSION III: MISCELLANEOUS ARCHITECTURAL SUPPORT,
Chair: David Ditzel, Sun Microsystems
"Coherency for Multiprocessor Virtual Address Caches,"
J. Goodman, U. of Wisconsin
"Cheap Hardware Support for Software Debugging and
Profiling," T. Cargill, B. Locanthi, AT&T Bell Labs
"An Experimental Coprocessor for Implementing
Persistent Objects on an IBM 4381," C. Georgiou,
S. Palmer, P. Rosenfeld, IBM T.J. Watson Research
Center
Wednesday, October 7
09:10-10:20 SESSION IV: COMPILERS I, Chair: John Hennessy,
Stanford University
"Integer Multiplication and Division on the HP
Precision Architecture," D. Magenheimer, L. Peters,
K. Pettis, D. Zuras, Hewlett-Packard
"The Mahler Experience: Using an Intermediate
Language as a Machine Description," D. Wall,
M. Powell, DEC Western Research Lab
"A Study of Scalar Compilation Techniques for
Pipelined Supercomputers," S. Weiss, J. E. Smith,
MCC
10:20-10:50 BREAK
10:50-12:00 SESSION V: COMPILERS II, Chair: Steven Muchnick,
Sun Microsystems
"Compiling Smalltalk-80 to a RISC," W. Bush,
A. Samples, D. Ungar, P. Hilfinger, U.C. Berkeley
"How Many Addressing Modes are Enough?," F. Chow,
S. Correll, M. Himelstein, E. Killian, L. Weber,
MIPS Computer Systems
"Superoptimizer--A Look at the Smallest Program,"
H. Massalin, Columbia University
12:00-01:30 LUNCH
01:30-03:00 SESSION VI: FUNCTIONAL & LOGIC LANGUAGES, Chair:
Randy Katz, U.C. Berkeley
"Performance and Architectural Evaluation of the
PSI Machine," H. Nakashima, K. Taki, K. Nakajima,
ICOT
"RISCS or CISCs for Prolog: A Case Study,"
G. Borriello, A. Cherenson, P. Danzig, M. Nelson,
U.C. Berkeley
"A RISC Architecture for Symbolic Computation,"
R.B. Kieburtz, Oregon Graduate Center
03:00-03:30 BREAK
03:30-04:40 SESSION VII: NEW MACHINES I, Chair: Jim Goodman,
U. of Wisconsin
"Design Tradeoffs to Support the C Programming
Language in the CRISP Microprocessor,"
D. Ditzel, Sun Microsystems, H. McLellan,
A. Berenbaum, AT&T Bell Labs
"Firefly: A Multiprocessor Workstation," C. Thacker,
L. Stewart, DEC Systems Research Center
"Pipelining and Performance in the VAX 8800 Processor,"
D. Clark, DEC
08:00-10:00 PANEL SESSION: COMPILER SCHEDULED ARCHITECTURES:
HORIZONTAL AND VERTICAL ORGANIZATIONS,
Organizer: Martin Freeman, Stanford University & Philips
Research Labs,
Panelists: Steven Muchnick, Sun Microsystems, Mike Johnson,
AMD, Joseph Fisher, Multiflow, Bob Rau, Cydrome.
Thursday, October 8
08:40-10:00 SESSION VIII: NEW MACHINES II, Chair: E. M. McCreight,
Xerox PARC
"A VLIW Architecture for a Trace Scheduling Compiler,"
R. Colwell, R. Nix, J. O'Donnell, D. Papworth, P. Rodman,
Multiflow Computer Inc.
"Parallel Computers for Graphics Applications," A. Leventhal,
M. Paquette, J. Lawson, P. Hanrahan, PIXAR, Inc.
"The ZS-1 Processor," J.E. Smith, G. Dermer, B. Vanderwarn,
S. Klinger, C. Rozewski, D. Fowler, K. Skidmore, J. Laudon,
Astronautics Corporation of America
10:00-10:30 BREAK
10:30-12:00 PANEL SESSION: LIES, DAMNED LIES, AND BENCHMARKS,
Organizer: Alan Smith, U.C. Berkeley,
Panelists: Jim Gray, Tandem, Harry Nelson, Lawrence
Livermore Labs, Forest Baskett, Silicon Graphics,
Doug Clark, DEC Hudson, John Hennessy, Stanford University
REGISTRATION
Conference registration includes one copy of the proceedings, lunches,
breaks, etc. Tutorial registration covers both tutorials and includes
one copy of the notes for each tutorial, a lunch, and breaks. Student
registration does not include meals. For further information contact
Martin Freeman, (415) 725-3633, mfreeman@sierra.stanford.edu.
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