[comp.arch] Power vs number of circuits

davis@unc.UUCP (09/30/87)

In article <5270@jade.BERKELEY.EDU>, mwm@eris.BERKELEY.EDU (MikeMeyer) writes:
> ...I suspect
> going to multi-chip cpus lets you get the same speed with less heat.

The pad drivers for high speed integrated circuits use a significant
amount of the power supplied to the chip.  Although a multi-chip cpu
would have more cooling area, it also would have a lot more power
hungry pad drivers.  I suspect Cray's conservative approach to
implementation hardware is more responsible for the selection of
multi-chip cpu's than cooling considerations.

Mark (davis@cs.unc.edu)

lamaster@pioneer.arpa (Hugh LaMaster) (09/30/87)

In article <1449@unc.cs.unc.edu> davis@unc.cs.unc.edu (Mark Davis) writes:

>hungry pad drivers.  I suspect Cray's conservative approach to
>implementation hardware is more responsible for the selection of
>multi-chip cpu's than cooling considerations.

Actually, cooling considerations have ALWAYS been one of the primary tradeoffs
in supercomputer design.  Seymour Cray is not necessarily the world's best
"architect", but he sure has been the best at packaging and plumbing.  If you
don't believe it, ask some CDC engineers how much fun they had in trying to
package the original STAR without him.  Or why his machines are always
smaller, and have faster clocks, than other similar complexity (gate count,
etc.) machines from other designers.  Current Cray technology is a 250MHz
processor.  Try clocking your 68020 or MIPS machine at that speed and see how
long it takes to melt.






  Hugh LaMaster, m/s 233-9,  UUCP {topaz,lll-crg,ucbvax}!
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(Disclaimer: "All opinions solely the author's responsibility")

mark@mips.UUCP (Mark G. Johnson) (10/01/87)

In article <2934@ames.arpa>, lamaster@pioneer.arpa (Hugh LaMaster) writes
	> Current Cray technology is a 250MHz processor.  Try clocking
	> your 68020 or MIPS machine at that speed and see how long it
	> takes to melt.

In the MIPS CPU case, about 3/4 of its 2W power dissipation (at 60 ns
cycle) is due to switching (power = C*V*V*f).  However, assume the worst,
that ALL power consumption is due to switching transients.  Then you
just scale by (60ns / 4ns) and find that its power at 250 MHz would
be 30 Watts.  Since it's now a Cray-class device, it gets to use a
Cray-sized 50 ton refrigeration unit, so 30 Watts should be no problem :-).

Of course, we'd drop to a power supply of 3 volts, in which case the
C*V*V*f power consumption would fall by (3/5) squared, giving 10.8 Watts.
This power level is routinely acccomodated today, in air-cooled
conventional packaging (for example in the larger ECL gate arrays).
-- 
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fouts@orville.nas.nasa.gov (Marty Fouts) (10/02/87)

In article <732@obiwan.UUCP> mark@mips.UUCP (Mark G. Johnson) writes:
>In article <2934@ames.arpa>, lamaster@pioneer.arpa (Hugh LaMaster) writes
>	> Current Cray technology is a 250MHz processor.  Try clocking
>	> your 68020 or MIPS machine at that speed and see how long it
>	> takes to melt.
>
>In the MIPS CPU case, about 3/4 of its 2W power dissipation (at 60 ns
>cycle) is due to switching (power = C*V*V*f).  However, assume the worst,
>that ALL power consumption is due to switching transients.  Then you
>just scale by (60ns / 4ns) and find that its power at 250 MHz would
>be 30 Watts.  Since it's now a Cray-class device, it gets to use a
>Cray-sized 50 ton refrigeration unit, so 30 Watts should be no problem :-).
>

Shouldn't you be taking the increase in volume of circuitry into
account?  After all, MY Cray 2 has 2 gigabytes of memory in the same
cabinetry as 4 CPUs.  The total effect that the added part count has
on power dissipation through can be estimated by multiplying 30 watts
by 120000 (the number of parts in a Cray 2 CPU) and dividing by
whatever the number of components in a MIPS CPU case are.  Since I
don't know this number I'll just divide by 100 and come up with 36
KWatts, which is slightly higher than your estimate.