danielwong@zgov01.dec.com.UUCP (11/18/87)
Has anyone heard of a commercially available systolic array type of processor which is targetted for digital signal processing transformations like FFTs, IFFTs, FWHTs etc. Thanking everyone in advance. <DANIEL>
hammonds@rpics (Steve) (11/18/87)
In article <8711180016.AA02055@decwrl.dec.com> danielwong@zgov01.dec.com (Daniel Wong Su Chun (PDE/Test)) writes: >Has anyone heard of a commercially available systolic array type of >processor which is targetted for digital signal processing transformations >like FFTs, IFFTs, FWHTs etc. >Thanking everyone in advance. ><DANIEL> A group on the CS dept. at CMU developed a processor called the Warp and I believe that it is being commercialized by GE in Syracuse NY. I don't know the status of its commercialization though. Warp is a systolic array that was designed for image and signal processing. Steve Hammond RPI CS Dept. hammonds@cs.rpi.edu
stevo@jane.Jpl.Nasa.Gov (Steve Groom) (11/18/87)
NCR Microelectronics Division in Ft. Collins, CO has been working on
their GAPP (Geometric Arithmetic Parallel Processor) system for a while
now. It consists of up to 2304 processors on a single Multibus board.
We in the Image Analysis Systems Group here at JPL have a prototype
version which we have been using for experimenting with parallel
processing algorithms for hyperspectral image analysis.
The functional specification document for our system claims that:
"The system design will meet the requirements of processing a field
of 48x48 pixels at 10 million GAPP instructions per second for a
single array board system. With the addition of input and output
buffers, the system will permit an I/O data clock rate of 10 MHz per
array board with words up to 6 bits in length.
(disclaimer on)
I should state that because of my limited exposure to the operation of
the system I feel I am not qualified to review the functional and
performance aspects of it. My experience with it to date has been
mostly from a systems standpoint, i.e. developing a UNIX driver
(MASSCOMP RTU on an MC 5600) for it, and hardware/software
installation. However, I can say that we have seen (as predictable) a
dramatic speedup in the types of image processing tasks that we do.
(disclaimer off)
Being a prototype system, it has had a few problems, but these appear
to be more in the implementation of the GAPP controller board rather
than in the GAPP chips themselves. I do not know that the GAPP system
is currently generally available, although I suspect it is not, because
our agreement with NCR is that our prototype system will be replaced
with the production system when it becomes available.
For details, I suggest you contact NCR directly. I belive that the
address below will find the GAPP development people.
NCR Corporation, Microelectronics Division
Digital Processing Group
2001 Danfield Court
Fort Collins, CO 80525
(You might also want to put something like "ATTN: GAPP development" or
whatever in there, as I don't have anybody's name I can give out as a
contact. If direct contact is unsuccessful, I may be able to put you in
touch with someone.)
-steve
/* Steve Groom, MS 168-522, Jet Propulsion Laboratory, Pasadena, CA 91109
* ARPA: stevo@elroy.jpl.nasa.gov UUCP: ..!cit-vax!elroy!stevo
* Disclaimer: (thick German accent) "I know noothingg! Noothingg!"
*/eugene@pioneer.arpa (Eugene Miya N.) (11/19/87)
In addition to the GAPP and the WARP, there is also the Matrix by SAXPY
(formerly Guiltech), you know that company which made the news about
technology to the Soviets..... ;-) You have to use the VMS front-end to
use it.
From the Rock of Ages Home for Retired Hackers:
--eugene miya, NASA Ames Research Center, eugene@ames-aurora.ARPA
"You trust the `reply' command with all those different mailers out there?"
"Send mail, avoid follow-ups. If enough, I'll summarize."
{hplabs,hao,ihnp4,decwrl,allegra,tektronix}!ames!aurora!eugenejohnm@well.UUCP (11/19/87)
In article <8711180016.AA02055@decwrl.dec.com> danielwong@zgov01.dec.com (Daniel Wong Su Chun (PDE/Test)) writes: >Has anyone heard of a commercially available systolic array type of >processor which is targetted for digital signal processing transformations >like FFTs, IFFTs, FWHTs etc. >Thanking everyone in advance. ><DANIEL> Saxpy Computer Inc. (of Silicon Valley technology theft fame) makes such a machine. I think there is only one commercial version out there in the real world so far. Purchased by the Navy for ASW applications. John Markoff
unniks@hi3.aca.mcc.com.UUCP (C. Unnikrishnan) (11/19/87)
in article <8711180016.AA02055@decwrl.dec.com>, danielwong@zgov01.dec.com (Daniel Wong Su Chun (PDE/Test)) says: > > Has anyone heard of a commercially available systolic array type of > processor which is targetted for digital signal processing transformations > like FFTs, IFFTs, FWHTs etc. > Thanking everyone in advance. > <DANIEL> yes, you are in luck. NCR makes what they call the gapp (geometric arithmetic parallel processor part no. ncr45cg72). it is a 2-d systolic array chip. it is mesh connected 6 x 12 1 bit processors. each element can communicate with four neighbours. n, s, e, w etc. it can be cascaded into arbitrary sizes in multiples of 6 x 12 elements. - cmos systolic array with 72 processors per chip - simd architecture - fully cascadeable - 128 bits of ram per processor - overlapped i/o and computation - broadcast global input and output etc. my colleague who is an ex-ncr says that ncr has stopped manufacturing these chips. dont know any more details. good luck unni ******************************************************************************* C. Unni Krishnan unni@mcc.COM ##Arpa Internet unniks%hulk@milano.UUCP {...,gatech,..}!ut-sally!im4u!milano!hulk!unniks ##UUCP *******************************************************************************
swm@nancy (Swami Manohar) (11/19/87)
In article <3436@ames.arpa> eugene@pioneer.UUCP (Eugene Miya N.) writes: >In addition to the GAPP and the WARP, there is also the Matrix by SAXPY >(formerly Guiltech), you know that company which made the news about >technology to the Soviets..... ;-) You have to use the VMS front-end to >use it. > Could someone please post more details about the Matrix by SAXPY or provide pointers to sources of more info? I understand it is some kind of sytolic array for solving matrix problems, but I would like to know the kind of problems it can solve, the hardware configuration etc. Thanks a lot, Manohar ------------------------------------------------------------------------------ Swaminathan Manohar CSNET: swm@cs.brown.edu Box 1910, Brown University ARPANET: swm%cs.brown.edu@relay.cs.net Providence, RI02912 BITNET: swm@BROWNCS Tel: (401)-863-3264 (work) UUCP: {ihnp4,allegra}!brunix!swm
hammonds@rpics (Steve) (11/24/87)
>Could someone please post more details about the Matrix by SAXPY or >provide pointers to sources of more info? >I understand it is some kind of sytolic array for solving matrix problems, >but I would like to know the kind of problems it can solve, the >hardware configuration etc. >Thanks a lot, > >Manohar > There was a special issue on systolic arrays in IEEE Computer this summer. There is a paper in it by Rob Schreiber that gives some information about the SAXPY 1-M. Anyone know why no papers from CMU were in the special issue but almost all the papers referenced the work by those folks??? Mildly curious. Steve Hammond RPI CS Dept. hammonds@cs.rpi.edu
stevo@jane.Jpl.Nasa.Gov (Steve Groom) (11/25/87)
In article <270@hi3.aca.mcc.com.UUCP> unniks@hi3.aca.mcc.com.UUCP (C. Unnikrishnan) writes: >... >my colleague who is an ex-ncr says that ncr has stopped manufacturing >these chips. dont know any more details. >... Reading this news caused some distress, as (you may remember from an earlier posting) we have a prototype version of the GAPP system, and are awaiting availability of the production version. After checking with the GAPP people at NCR, they have assured us that NCR has not discontinued the GAPP, and that the production version will be in our hands around mid-December. What exactly did your ex-NCR colleague have to say? According to our contacts at NCR, his information is flat out wrong. /* Steve Groom, MS 168-522, Jet Propulsion Laboratory, Pasadena, CA 91109 * ARPA: stevo@elroy.jpl.nasa.gov UUCP: ..!cit-vax!elroy!stevo * Disclaimer: (thick German accent) "I know noothingg! Noothingg!" */
akt@COS.COM (Amit Thakur) (12/01/87)
In article <4482@well.UUCP>, johnm@well.UUCP (john markoff) writes: > In article <8711180016.AA02055@decwrl.dec.com> danielwong@zgov01.dec.com (Daniel Wong Su Chun (PDE/Test)) writes: > >Has anyone heard of a commercially available systolic array type of > >processor which is targetted for digital signal processing transformations > >like FFTs, IFFTs, FWHTs etc. > >Thanking everyone in advance. > ><DANIEL> > > Saxpy Computer Inc. (of Silicon Valley technology > theft fame) makes such a machine. I think there is > only one commercial version out there in the real > world so far. Purchased by the Navy for ASW applications. > John Markoff I recently read in the news that the Customs service arrested someone for trying to illegally export one (some?) of these to Warsaw Bloc nation(s?). I was wondering what is so special/funky about Saxpy's computers that the Russkies want them. Also, I read conflicting accounts of whether the Pentagon had actually bought one of these machines or not. One report I read said that Saxpy was hoping to sell its machines to the Pentagon. akt@cos.com
ian@esl.UUCP (Ian Kaplan) (12/03/87)
>Has anyone heard of a commercially available systolic array type of >processor which is targetted for digital signal processing transformations >like FFTs, IFFTs, FWHTs etc. >Thanking everyone in advance. ><DANIEL> > In my opinion one of the best commercially available systolic processors is the Warp. The Warp was designed by H.T. Kung and his colleagues at Carnegie Mellon University. The Warp is being built and marketed by General Electric and costs about $350K. The Warp has a peak performance of 100 MFLOPS (single precision) and about 40 MFLOPS average. This is about the speed of a Cray 1S. The hardware organization of the Warp is that of a ten cell systolic pipeline. Each cell can execute a different program, so the Warp is a MIMD machine, although it can be used like an SIMD machine if the user desires. Unlike most high speed parallel processors, the Warp comes with an excellent software suite that supports software development and debugging. This includes a compiler for a high level language named W2. Also included is Dr. Jon Webb's image processing library (known as the WEB library) and his Apply language for image processing. The WEB library includes several FFT routines for image processing. Some signal processing operations, like adaptive beam forming, have also been done on the Warp. For more information on the Warp see "The Warp Computer: Architecture, Implementation, and Performance", Marco Annaratone et al, IEEE Trans. on Computers, Dec. 1987, pgs 1523-1538. Ian L. Kaplan ESL, Advanced Technology Systems M/S 302 495 Java Dr. P.O. Box 3510 Sunnyvale, CA 94088-3510 decvax!decwrl!borealis!\ sdcsvax!seismo!- ames!esl!ian ucbcad!ucbvax!/ / ihnp4!lll-lcc!