koopman@A.GP.CS.CMU.EDU (Philip Koopman) (12/14/87)
A while ago I posted a request for references to stack-oriented computer architectures. Below is a list of references to what I consider to be interesting stack architectures. Thanks to all who responded. Implemented Machines: --------------------- Burroughs B5000 etc. "Twenty Years of Burroughs High-Level Language Machines", E. D. Earnest, Proceedings of the International Workshop on High-Level Language Architecture, June 1980, p 64. Harris FORCE "FORTH Processor Core for Integrated 16-Bit Systems", Danile and Malinowski, VLSI System Design, JUN 87. HP3000 "The HP3000", Bartlett, Proceedings of the ACM-IEEE symposium on HLL Architectures, 1973, p 61. Inmos Transputer "The Transputer", Whitby-Strevens, 12th Annual International Symposium on Computer Architecture, 1985, p 292. John's Hopkins/APL 32-bit Forth Processor "An Architecture for the Direct Execution of the Forth Programming Language", Hayes et al., Proceedings of ASPLOS II, 1987. KDF.9 (English Electric Co.) "The KDF.9 Computer System", Haley, 1962 AFIPS FJCC, vol 22, p 108. Microdata 3200 "Microprograming, stack architecture ease minicomputer programer's Burden", Burns and Savitt, Electronics, Feb 15, 73, p 95. Novix NC4000 "The Novix NC4000 Project", Jennings, Computer Language, OCT 85. Rockwell AAMP "MOS/SOS Microprocessor", Best et al., IEEE Micro, AUG 82, p 11. MU5 The MU5 Computer System, Morris and Ibbett, Springer-Verlag, New York, 1979. WISC CPU/32 "Writable Instruction Set, Stack Oriented Computers: The WISC Concept", Koopman, Proceedings of the 1987 Rochester Forth Conference, Journal of Forth Applications and Research. Also, there have been several Forth hardware machines implemented (usually with AMD 2901 components). And several standard microprocessors (such as the 6502 and Z80) modified to run Forth, usually with a ROM chip set. Theoretical stack machines & Academic exercises: ------------------------------------------------ "A Reduced High-Level-Language Instruction Set", Schulthess, IEEE Micro, JUN 84, p 55. "The design and implementation of a small scale stack processor system", Lutz, AFIPS NCC, 1973, vol 42, p 545. "Socrates", Foster, 2nd Annual Symposium on Computer Architecture, 1975, p 165 A good discussion of stack architectures may be found in the May, 1977 issue of Computer (special issue on stack architectures.) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~ Phil Koopman 5551 Beacon St. ~ ~ Pittsburgh, PA 15217 ~ ~ koopman@faraday.ece.cmu.edu (preferred address) ~ ~ koopman@a.gp.cs.cmu.edu ~ ~ ~ ~ Disclaimer: I'm a PhD student at CMU, and I do some ~ ~ work for WISC Technologies. ~ ~ (No one listens to me anyway!) ~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drew@wolf.UUCP (Drew Dean) (12/17/87)
Another stack machine worth mentioning is the Lilith, designed at ETH Zurich
to run Modula-2. (See my earlier posting)
References: ETH Zurich published several notes, and
Orhan, Richard, "Lilith and Modula-2," Byte, Vol. 9, No. 8, August 1984, pp.
181 - 194.
Drew Dean
UUCP: {sdcsvax,ihnp4}!jack!wolf!drew
FROM Disclaimers IMPORT StandardDisclaimer;toma@tekgvs.TEK.COM (Tom Almy) (12/18/87)
I thought I'd mention the 8087 family. Even though it is just a coprocessor, it does stack operations (register-register operations with difficulty). For instance, when the 8087 stack is used as the stack for floating point operations, F@ F! F+ F- F* F/ FABS FDROP FDUP FSWAP and FOVER can all be done a single instruction (plus interpreter overhead, if any, no overhead if the Forth code is compiled). FROT FIX and FLOAT take two or three instructions. Most operation have non-destructive modes as well, so that operations such as FDUP F! can be performed as a single instruction as well. Tom Almy toma@tekgvs.TEK.COM !tektronix!tekgvs!toma