jack@cwi.nl (Jack Jansen) (01/01/70)
Hmm, I've seen so much misinformation on PDP-11 history by now, I might as well throw in my own 10 cents of misinformation: 1st generation. 11/20 Basic pdp-11, no FPU, no MMU, 18 bit unibus (of which only 16 were useable). 2nd generation. 11/45 The first big thing. FPU, MMU (separate I/D), 2 18-bit unibusses. The 11/55 seems to be a slightly modified version of this thing. 11/10 Low-end machine. No FPU, no MMU. 18 bit unibus with only 16 bits useable. Optional Extended Instruction Set that gave you DIV, shift-multiple and some other goodies. Also known as 11/05 (OEM) and GT-40 (with vector scope) 3rd generation. 11/40 In between 10 and 45. Optional MMU, optional EIS, optional (incompatible) FPU. 18 bit unibus. MMU didn't have separate I/D space, no support for instruction backup, no PIRQ, no soft SP interrupt, etc. ==11/35. 11/70 New high-end machine. FPU, MMU (superset of 45 MMU), 18 bit unibus and 22 (or is it 24?) bit memory bus. Massbus (fast bus for mass-storage peripherals). MMU had a 'unibus map', so unibus peripherals could reach all of memory. 4th generation. 11/34 Replacement for 11/40. Basically the same thing in newer technology, with EIS and MMU standard, and optional (11/45 compatible) FPU. 11/04 11/10 replacement in newer technology. From now on, things become fuzzy. But, just for your misinformation, I'll tell what I know, in roughly chronological order. 11/60 Meant to be new high-end, but failed completely. Very fast CPU with user-loadable microcode (but only for one or two instructions:-(), MMU, FPU, but only 18 bit memory bus, and no separate I/D. Grumpf. 11/780 First VAX. Basically an 11/04 with an extra 32 bit processor and lots of extra busses. Also slightly more expensive. 11/03 LSI version of 11/04. First Q-bus machine. The Q-bus is a poor-mans-unibus: multiplexed A/D lines, only one level of interrupts, etc. 11/23 LSI version of 11/34 with Q-bus. 11/24 Ditto, only this one had a unibus, a 22 bit memory bus and a unibus map. 11/74 LSI version of 11/70, with qbus. 11/84 Souped up version of 11/74. -- Jack Jansen, jack@cwi.nl (or jack@mcvax.uucp) The shell is my oyster.
roy@phri.UUCP (Roy Smith) (10/04/87)
In article <29933@sun.uucp> guy%gorodish@Sun.COM (Guy Harris) writes: > a PDP-11/55 (which was an 11/45 with bipolar memory hung off a fast > memory bus). The closest I ever came to one of these was 1) reading the CPU hardware manual and 2) poking around in one which had been discarded. Anybody ever actually have one of these beasties? Must have run like greased lightening. How many were actually made? As I remember, the 11/45 was capable of having a certain amount (8kbytes?) of MOS or bipolar ram in place of some of the core. Anybody ever have a 45 so equiped? Did it make much difference? -- Roy Smith, {allegra,cmcl2,philabs}!phri!roy System Administrator, Public Health Research Institute 455 First Avenue, New York, NY 10016
ron@topaz.rutgers.edu (Ron Natalie) (10/04/87)
The memory on a 11/45 are the so called "fast-bus." Similar to the regular Tunabus but faster. It is certainly possible to install MOS memory in there. We had EMM memorry with a hacked fast-bus controller on the 11/45 at JHU, and yes it was much faster than the all-core 11/45's that were kicking around. -Ron who woo - Strange joke, Local origin
loverso@encore.UUCP (John LoVerso) (10/06/87)
In article <2949@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: > As I remember, the 11/45 was capable of having a certain amount > (8kbytes?) of MOS or bipolar ram in place of some of the core. Anybody > ever have a 45 so equiped? Did it make much difference? The answer is in the time(1) manual page from 4.3 dating back to v7: "On a PDP-11, the execution time can depend upon what kind of memory the program happens to land in; the user time in MOS is often half what it is in core." John Robert LoVerso Encore Computer Corp encore!loverso, loverso@multimax.arpa
tsmith@gryphon.CTS.COM (Tim Smith) (10/07/87)
In article <2949@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: >In article <29933@sun.uucp> guy%gorodish@Sun.COM (Guy Harris) writes: >> a PDP-11/55 (which was an 11/45 with bipolar memory hung off a fast >> memory bus). > The closest I ever came to one of these was 1) reading the CPU >hardware manual and 2) poking around in one which had been discarded. >Anybody ever actually have one of these beasties? Must have run like >greased lightening. How many were actually made? Was it a faster 11/45, or an OEM 11/60? I don't know, but I do remember that DEC had a habit of producing a machine (11/10, 11/40) for "end users", then a version -5 for OEMs (11/05, 11/35). I've had little experience with the 11/60 (other than a few evenings sysgen'ing RSX on one), but as I remember the 11/60 was a very special beastie, with, I believe, user- writeable microcode. Not at all like a typical PDP-11. But please correct me if wrong--I claim no expert knowledge with 11/60's. The one I used briefly was the property of a physics department, and I was told that it was sold to them as DEC's ultimate Fortran engine (circa 1980 here). -- Tim Smith INTERNET: tsmith@gryphon.CTS.COM UUCP: {hplabs!hp-sdd, sdcsvax, ihnp4, ....}!crash!gryphon!tsmith UUCP: {philabs, trwrb}!cadovax!gryphon!tsmith
fouts@orville.nas.nasa.gov (Marty Fouts) (10/07/87)
It has been a few year (;-) since I played with PDP 11/XX machines, but let me try to dredge some data from memory. The 11/60 was suppose to be the be all / end all of the PDP (as opposed to LSI) 11/XX machines. (The distinction was that PDP engines were all TTL and LSI were lsi) It was late. (Anybody surprised?) So DEC whipped together a hacked up version called the 11/70; which was the last core memory "tall boy" cabinet PDP 11. The 11/60 ended up in a "low boy" cabinet (half height - double width) and had MOS memory in most (all?) cases as well as a Writable Control Store. The 70 had massbus adapters, a unibus and two data paths from the processor to memory, so became the more popular machine. We managed to support 30-50 people on a 70 running RSTS/E, mostly doing school adminstration (payroll, grades, etc) and learning Basic, Fortran and PASCAL; something we were never able to get an 11/780 to do. That 70 had 256kb of mos memory and 4 RL02 (5 MB each) disk drives. . . Down the road, a different school at a 60 and was able to support about the same number of people, so I guess the two machines were roughly equivalent. Marty
guy%gorodish@Sun.COM (Guy Harris) (10/07/87)
> Was it a faster 11/45, or an OEM 11/60?
No, it was a faster 11/45, according to the PDP-11 04/34/45/55 Processor
Handbook:
The PDP-11/55 is a bipolar memory based computer designed for greater
processor and system performance through the use of a dedicated
internal semiconductor memory bus. ... The PDP-11/55 can be expanded
up to 248K bytes with the aid of the memory management unit which is an
integral part of the central processor. The fast floating point
processor operates as an integral part of the central processor...
...
The PDP-11/45 has a cycle time of 300 nsec and performs all arithmetic
and logical operations required in the system. A Floating Point
Processor mounts integrally into the Central Processor as does a Memory
Management Unit...
So I guess the 11/55 was a "loaded" 11/45, with semiconductor memory (which is
not mentioned in the description of the 11/45) and a standard MMU and FPP.
By the time the 11/60 came out, the "version - 5" for end-users convention
was gone. Early draft versions of the 11/34 manual mentioned an 11/39, but
unless they put out a few early ones I don't think they ever put an 11/39 label
on that machine.
The 11/60 was, indeed, a machine with user-writable microcode; it also had
FPP-compatible microcode, so you could execute FPP instructions even if you
didn't have an FPP. Unfortunately, it didn't support 22-bit addressing.
Guy Harris
{ihnp4, decvax, seismo, decwrl, ...}!sun!guy
guy@sun.comhenry@utzoo.UUCP (Henry Spencer) (10/07/87)
> As I remember, the 11/45 was capable of having a certain amount > (8kbytes?) of MOS or bipolar ram in place of some of the core. Anybody > ever have a 45 so equiped? Did it make much difference? The little-known 11/50 was an 11/45 packaged with the small amount of fast memory. The reason why you don't hear much about it was that it was sold into a specialized market: commercial applications running RSTS. The idea was that you would put the BASIC interpreter into the fast memory, which would indeed make quite a difference to the performance of RSTS. It wasn't so useful in a more general environment. The 55 had enough fast memory for it to be really practical. (Incidentally, as I recall -- it's been a while -- there was one other difference between the 45 and the 55. The 55 had the faster floating-point processor originally developed for the 11/70, I think.) -- PS/2: Yesterday's hardware today. | Henry Spencer @ U of Toronto Zoology OS/2: Yesterday's software tomorrow. | {allegra,ihnp4,decvax,utai}!utzoo!henry
kent@decwrl.dec.com (Christopher A. Kent) (10/08/87)
A very large difference between the 11/60 and 11/70 was that the 11/70 had split instruction and data spaces. So operating systems that knew how to make use of this feature (that is, Unix) could run much larger programs. The 11/45 was the only other 11 to have this feature. DEC never produced an operating system that took advantage of it, because EVERYTHING was supposed to be able to run on the least common denominator hardware. On the other hand, I've heard all sorts of stories about what they're doing to squeeze more and more bits into RSTS, so who knows if this is still true? chris -- Chris Kent Western Research Laboratory Digital Equipment Corporation kent@decwrl.dec.com decwrl!kent (415) 853-6639
pcm@ogcvax.UUCP (Phil Miller) (10/08/87)
One more time... Can we PLEASE MOVE THIS DEBATE TO ANOTHER FORUM? Numerous complaints about this discussion have been posted. PLEASE take the hint.
dave@sdeggo.UUCP (David L. Smith) (10/08/87)
In article <72@bacchus.DEC.COM>, kent@decwrl.dec.com (Christopher A. Kent) writes: > A very large difference between the 11/60 and 11/70 was that the 11/70 > had split instruction and data spaces. So operating systems that knew how > to make use of this feature (that is, Unix) could run much larger programs. > > The 11/45 was the only other 11 to have this feature. DEC never produced an > operating system that took advantage of it, because EVERYTHING was supposed > to be able to run on the least common denominator hardware. Well, as of 1982 or thereabouts you could build a split I&D kernel and I believe that you could specify it when you linked (TKB'd) a program. Ah, nostalgia... -- David L. Smith {sdcsvax!amos,ihnp4!jack!man, hp-sdd!crash, pyramid}!sdeggo!dave sdeggo!dave@amos.ucsd.edu "How can you tell when our network president is lying? His lips move."
ron@topaz.rutgers.edu (Ron Natalie) (10/08/87)
11/55's are 11/45 CPU's with different packaging (bipolar memory and a blue front panel). 11/60's are indeed the user writable microcode machines. They have the silly 11/34 style front panel and no split-I/D or other 45/70 specific features.
eeproks@pyr.gatech.EDU (Ken Seefried iii) (10/09/87)
In article <3019@ames.arpa> fouts@orville.nas.nasa.gov.UUCP (Marty Fouts) writes: > . The 11/60 was suppose >to be the be all / end all of the PDP (as opposed to LSI) 11/XX >machines. (The distinction was that PDP engines were all TTL and LSI >were lsi) This is not quite true. I have a PDP-11/2 and it is definately of LSI construction. -------------------------------------------------------------------------- K. J. Seefried iii School of Information and Computer Science P.O. Box 30104, Georgia Insitute of Technology, Atlanta Georgia, 30332 uucp: ...!{decvax,hplabs,ihnp4,linus,rutgers,seismo}!gatech!gitpyr!eeproks \-!gatech!gt-stratus!ken internet: eeproks@pyr.gatech.edu || ken@stratus.gatech.edu
ron@topaz.rutgers.edu (Ron Natalie) (10/09/87)
The RSX use of split I/D came in RSX-11M+ which allowed you to use split I/D in supervisor mode. -Ron What no mark instruction?
billa@ihlpl.ATT.COM (Anderson) (10/09/87)
In article <15422@topaz.rutgers.edu>, ron@topaz.rutgers.edu (Ron Natalie) writes: > 11/55's are 11/45 CPU's with different packaging (bipolar memory and a blue > front panel). 11/60's are indeed the user writable microcode machines. They > have the silly 11/34 style front panel and no split-I/D or other 45/70 > specific features. This material has no valid contribution to MINIX. Please do not post material that has nothing to do with MINIX.
billa@ihlpl.ATT.COM (Anderson) (10/09/87)
In article <15422@topaz.rutgers.edu>, ron@topaz.rutgers.edu (Ron Natalie) writes: > 11/55's are 11/45 CPU's with different packaging (bipolar memory and a blue > front panel). 11/60's are indeed the user writable microcode machines. They > have the silly 11/34 style front panel and no split-I/D or other 45/70 > specific features. This material has no contribution to the MINIX newsgroup. Please be kind enough not to post such material to comp.os.minix Thanx
lawitzke@eecae.UUCP (John Lawitzke) (10/09/87)
For those of you who don't know how to use news:
There have been several/many postings under the topis of pdp-11/55
in the comp.os.minix group because of people blindly using the f
command to followup. You can easily use your favorite editor to go up
to the Newsgroups line and remove comp.os.minix. Please be a bit
more careful in the future with your followup messages and make sure
they are appropriate for the groups they are going to!
--
j UUCP: ...ihnp4!msudoc!eecae!lawitzke
ARPA: lawitzke@eecae.ee.msu.edu (35.8.8.151)fay@encore.UUCP (Peter Fay) (10/09/87)
In article <89@piring.cwi.nl} jack@cwi.nl (Jack Jansen) writes: } 11/20 Basic pdp-11, no FPU, no MMU, 18 bit unibus (of which } 11/45 The first big thing. FPU, MMU (separate I/D), 2 18-bit } 11/10 Low-end machine. No FPU, no MMU. 18 bit unibus with } 11/70 New high-end machine. FPU, MMU (superset of 45 MMU), } 11/34 Replacement for 11/40. Basically the same thing in } 11/04 11/10 replacement in newer technology. } 11/60 Meant to be new high-end, but failed completely. Very } 11/780 First VAX. Basically an 11/04 with an extra 32 } 11/03 LSI version of 11/04. First Q-bus machine. The Q-bus } 11/23 LSI version of 11/34 with Q-bus. } 11/24 Ditto, only this one had a unibus, a 22 bit memory } 11/74 LSI version of 11/70, with qbus. } 11/84 Souped up version of 11/74. I had the pleasure of using a PDP 11/70 at Hartford State Tech. Col. which was upgraded (according to the DEC rep) to the only existing (at that time) PDP 11/80 (?) in the country. Has anyone heard of the beast? -- peter fay fay@multimax.arpa {allegra|compass|decvax|ihnp4|linus|necis|pur-ee|talcott}!encore!fay
pdb@sei.cmu.edu (Patrick Barron) (10/10/87)
In article <89@piring.cwi.nl> jack@cwi.nl (Jack Jansen) writes: > 11/23 LSI version of 11/34 with Q-bus. > 11/24 Ditto, only this one had a unibus, a 22 bit memory > bus and a unibus map. The F-11 based machines (the 11/23 and 11/24) were also much slower than the 11/34. > 11/74 LSI version of 11/70, with qbus. > 11/84 Souped up version of 11/74. The 11/74 was a prototype multiprocessor 11/70. I think only one was ever made. The 11/73 is the Q-bus 11/70 (based on the J-11 chipset). The 11/83 is a faster 11/73 with a special memory bus (the PMI bus). The 11/84 is a Q-bus 11/83. --Pat.
henry@utzoo.UUCP (Henry Spencer) (10/11/87)
> ... Down the road, a different school at a 60 and was able to > support about the same number of people, so I guess the two machines > were roughly equivalent. Choke cough. No. The 60 was grossly inferior to the 70 in most ways: hardware address space, integer processing speed, I/O bandwidth, etc. Its optional floating-point hardware was (I think) the same as the 70's. Otherwise, it was a piece of junk. There has been persistent speculation that the original 60 was much faster than the one that was finally released to the customers; it is hard to see how it could possibly deserve that model number otherwise. A well-equipped 45 was a better machine, and the 55 could run rings around it. The (slightly later) 44 was superior to the 60 in every way except floating-point, where the 44's lousy FPP (a slight variant of the 34 FPP) held it back. -- "Mir" means "peace", as in | Henry Spencer @ U of Toronto Zoology "the war is over; we've won". | {allegra,ihnp4,decvax,utai}!utzoo!henry
henry@utzoo.UUCP (Henry Spencer) (10/11/87)
> The 11/45 was the only other 11 to have [split space]. No, later large 11s (44, 73, 8x) have it. It took them a while to learn that it was important, but they eventually did. Having Bell Labs / AT&T refuse to buy the 11/60 for this reason (I was told) made quite an impression on DEC. > DEC never produced an operating system that took advantage of it... I think this changed as the DEC operating systems grew. I'm not sure of that; I lost interest in DEC operating systems in early 1975 when Fifth Edition Unix came out. -- "Mir" means "peace", as in | Henry Spencer @ U of Toronto Zoology "the war is over; we've won". | {allegra,ihnp4,decvax,utai}!utzoo!henry
mason@tmsoft.UUCP (10/11/87)
In article <8740@utzoo.UUCP> henry@utzoo.UUCP (Henry Spencer) writes: >Choke cough. No. The 60 was grossly inferior to the 70 in most ways: >hardware address space, integer processing speed, I/O bandwidth, etc. The only interesting thing about the 11/60 is that it had (because of the (writable) microcode) many interesting (to some) instructions. Not having my PDP-11 Processor Handbooks right at hand (Where did I put them? They were here only 6 years ago) and never having programmed one, I'm not sure of all the instructions, but they included string and BCD operations (COBOL city, S/360 killers, etc.). I'm not sure any compilers ever produced code for the /60, as it was the only machine that had these instructions. ../Dave Mason
dennis@utgpu.UUCP (10/11/87)
In article <89@piring.cwi.nl> jack@cwi.nl (Jack Jansen) writes: > >I'll tell what I know, in roughly chronological order. [...] > 11/780 First VAX. Basically an 11/04 with an extra 32 > bit processor and lots of extra busses. Also slightly > more expensive. > 11/03 LSI version of 11/04. First Q-bus machine. The Q-bus > is a poor-mans-unibus: multiplexed A/D lines, only > one level of interrupts, etc. The chronology is quite rough here. I think the 11/03 might have been available as early as 1973 or 1974. I definitely saw my first one in 1976, a year or two before 11/780's were sold (indeed, the console subsystems in 11/780's include an 11/03). I remember this well, that 11/03 was the first computer I ever wanted to take home. I eventually did, but much later, I use the CPU as a paper weight. The Q-bus had 4 interrupt request lines from the beginning, like the Unibus, though the 11/03 only supported one level. The Q-bus did (and still does) only have one daisy-chained interrupt acknowledge line, however. I think the latter is the reason why the microVax always sets the processor priority to spl7() when servicing an interrupt (and why the clock on early Ultrixes loses time) no matter what the bus priority of the requesting device is. You can't tell for sure what the priority of the device which ends up taking the interrupt is. > 11/23 LSI version of 11/34 with Q-bus. But with 22 bit addressing. I remember cutting traces on old peripheral cards which used a couple of the new address lines as grounds so I could run an 11/23 in 22 bit mode and use the extra memory as a RAM disk for RT-11. > 11/74 LSI version of 11/70, with qbus. I think this is really an 11/73. And it probably wasn't exactly like an 11/70, it took years before DEC software would actually let you run a separate I/D space program, even through the same OS would do this fine on an 11/70. -- Dennis Ferguson Mechanical Engineering University of Toronto
stuartb@aa.ecn.purdue.edu (Brian Stuart) (10/12/87)
but until recently, one of these units was resident in the Computer Science Laboratory at the Rose-Hulman Institue of Technology. Unfortunately for computing history, the lab was cleaned out a couple of months ago and no one who knew of its contents was present. It seems that the 11/20 MMU was lost (thrown away) in the operation. If any one can confirm or refute this (mis?)information, I would like to know. This is just what I have been told by people who should know. Brian L. Stuart Purdue University
lawitzke@eecae.UUCP (John Lawitzke) (10/13/87)
Just how adle minded are you people? For the past couple of weeks
this PDP discussion has been spilling over to comp.os.minix which
it has nothing to do with! Several people have several times posted
articles asking that the crossposting be controlled! I'm sure you idiots
wouldn't like it if we crossposted MINIX articles to comp.arch and
comp.unix.wizards now would you? So show comp.os.minix some
consideration! &^%*&^%*&^% stupid &*^^%& snarl arffs!
ps- I really don't think you people are idiots, I just figure that
strong language will finally get your attention and you'll wake up!!!!
--
j UUCP: ...ihnp4!msudoc!eecae!lawitzke
ARPA: lawitzke@eecae.ee.msu.edu (35.8.8.151)jal@oliveb.UUCP (Benjamin G. Golding) (10/13/87)
> > 11/23 LSI version of 11/34 with Q-bus. > > But with 22 bit addressing. I think there were two versions of this model: the vanilla 11/23 had only 18 address lines, the 11/23+ had the full 22 on its Q-bus. Ben. -- Buy me, remember my books... St. Neresa of the Tet
fouts@orville.nas.nasa.gov (Marty Fouts) (10/13/87)
As I remember it, the various Cobolish instructions were part of the EIS math instructions. At least under RSTS/E it was possible to install Basic-Plus to use these instructions, and I think the Fortran library had support for them, but I don't remember the Fortran compiler generating them (;-)
jfh@killer.UUCP (The Beach Bum) (10/14/87)
Some other poster wrote that only the /60 had COBOL and other bizarre instructions. I didn't both with that posting because today I am being lazy. Tough luck. The /44 and /34 both had sockets for microcode ROMs that didn't come with the machine out of the box. There were two options that I was (am?) aware of. The first was a collection of COBOL instructions. The second was a set of string instructions, no unlike (by too much) what the VAX has. I also recall a set of chips for floating point in microcode, but that might have been additional microcode for the FPU. - John. -- John F. Haugh II HECI Exploration Co. Inc. UUCP: ...!ihnp4!killer!jfh 11910 Greenville Ave, Suite 600 "Don't Have an Oil Well?" Dallas, TX. 75243 " ... Then Buy One!" (214) 231-0993
richard@gryphon.CTS.COM (Richard Sexton) (10/14/87)
In article <15435@topaz.rutgers.edu> ron@topaz.rutgers.edu (Ron Natalie) writes: >The RSX use of split I/D came in RSX-11M+ which allowed you to use >split I/D in supervisor mode. > >-Ron > >What no mark instruction? I used a MARK instruction. Once. I read up on it, found a place to use it and used it. When I was showing the code to my boss, he said "What is THAT!" "Why it's a MARK instruction" I gloated. I explained to him what it did, how neat it was and he said: "Please remove it". -- Richard J. Sexton INTERNET: richard@gryphon.CTS.COM UUCP: {hplabs!hp-sdd, sdcsvax, ihnp4, nosc}!crash!gryphon!richard "It's too dark to put the keys in my ignition..."
tsmith@gryphon.CTS.COM (Tim Smith) (10/14/87)
In article <8741@utzoo.UUCP> henry@utzoo.UUCP (Henry Spencer) writes: +===== | > The 11/45 was the only other 11 to have [split space]. | | No, later large 11s (44, 73, 8x) have it. It took them a while to learn | that it was important, but they eventually did. Having Bell Labs / AT&T | refuse to buy the 11/60 for this reason (I was told) made quite an impression | on DEC. | | > DEC never produced an operating system that took advantage of it... | | I think this changed as the DEC operating systems grew. I'm not sure of | that; I lost interest in DEC operating systems in early 1975 when Fifth | Edition Unix came out. +===== This last paragraph is one of the more provocative statements that I have seen about PDP-11's. For demonstrating the wonders of Unix, for simple time-sharing, and for advanced (for 1975) text-processing, I'm sure that Unix V5 must have been brilliant in its time (wasn't it also an element known as unobtanium?). In my experience, most PDP-11s in the mid-70's made their way into labs, or onto factory floors. There, I am quite sure, Unix V5 would have shined not at all. For whatever you may think of RT (passable for the demands), or RSX (no comment), or RSTS (passable for the demands), they did do useful work. What *were* you doing with 11's in 1975? Just a curious question... +===== | "Mir" means "peace", as in | Henry Spencer @ U of Toronto Zoology | "the war is over; we've won". | {allegra,ihnp4,decvax,utai}!utzoo!henry +===== Actually, if I remember my college Russian correctly, "mir" means both "peace" and "world". That makes "mir" seem a most peaceable word. -- Tim Smith INTERNET: tsmith@gryphon.CTS.COM UUCP: {hplabs!hp-sdd, sdcsvax, ihnp4, ....}!crash!gryphon!tsmith UUCP: {philabs, trwrb}!cadovax!gryphon!tsmith
roy@phri.UUCP (Roy Smith) (10/14/87)
Some large number of people have now complained about all this
pdp-11 trivia showing up in comp.os.minix. Since I was the one who asked
the original 11/55 questions (and now I'm sorry I did), I feel a sort of
responsibility to clean this up (not to mention the various personal
letters I've gotten on the subject).
So, folks, if you still feel a need to talk about pdp-11 nostalgia,
please be sure to loose comp.os.minix group from the "Newsgroups: " line.
--
Roy Smith, {allegra,cmcl2,philabs}!phri!roy
System Administrator, Public Health Research Institute
455 First Avenue, New York, NY 10016rbl@nitrex.UUCP ( Dr. Robin Lake ) (10/14/87)
In article <154@aa.ecn.purdue.edu> stuartb@aa.ecn.purdue.edu.UUCP (Brian Stuart) writes: >Please forgive me if I screw this up as it is my first net posting. > >However, I thought that I would add my 2 cents worth of misinformation >regarding the history of PDP 11 systems. > >It is my understanding that a memory management unit was designed and >built for the PDP 11/20. However, exactly 3 of these units were constructed. >They were as large (physically and numbers of cards, etc.) as the >PDP 11/20 processor. I don't know about the existance of the other >two, but until recently, one of these units was resident in the >Computer Science Laboratory at the Rose-Hulman Institue of Technology. I believe one was constructed for a PDP-11 system at the Cleveland Clinic. It was based on reed-switches. The local DEC Field Service folks built their own tester for it. The Clinic has buried this project in oblivion, for it was one of the better historical classic failures. I used to use it as a model of how things could go wrong in my classes. I occassionally see one of the Field Service guys who worked on this system and will ask him next time we meet. The system was sold for scrap about 1975 --- and somewhere I have the card of the remarketer that bought it. The lack of a memory management unit on the PDP-11/20 was why I developed the first solid-state disk, by the way.... but to conserve bandwidth, that's only for those who request it! -- Rob Lake {decvax,ihnp4!cbosgd}!mandrill!nitrex!rbl
braun@m10ux.UUCP (MHx7079 mh) (10/15/87)
In article <3215@eecae.UUCP>, lawitzke@eecae.UUCP (John Lawitzke) writes: > Just how adle minded are you people? For the past couple of weeks > this PDP discussion has been spilling over to comp.os.minix which > it has nothing to do with! Several people have several times posted . . . > ps- I really don't think you people are idiots, I just figure that > strong language will finally get your attention and you'll wake up!!!! On the contrary, I have greatly enjoyed reading the PDP-11 articles. They have been very educational, and have helped me better understand what Minix does by comparing it to other systems. If the articles weren't here, I would not have time to find them in another newsgroup. -- Doug Braun AT+T Bell Labs, Murray Hill, NJ m10ux!braun 201 582-7039
phil@osiris.UUCP (Philip Kos) (10/15/87)
In article <4178@pyr.gatech.EDU>, eeproks@pyr.gatech.EDU (Ken Seefried iii) writes: > [The distinction that PDP- versions of DEC's 11 were all SSI and MSI TTL, > while LSI- versions were lsi] is not quite true. I have a PDP-11/2 and it > is definately of LSI construction. Quite true.. also, there was a specially-packaged LSI-11/2 which was called a PDP-11/03. Standard Q-bus, LSI-11/2 processor board, dual RX01 drives... phil
dave@onfcanim.UUCP (Dave Martindale) (10/16/87)
In article <2949@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: >In article <29933@sun.uucp> guy%gorodish@Sun.COM (Guy Harris) writes: >> a PDP-11/55 (which was an 11/45 with bipolar memory hung off a fast >> memory bus). > > As I remember, the 11/45 was capable of having a certain amount >(8kbytes?) of MOS or bipolar ram in place of some of the core. Anybody >ever have a 45 so equiped? Did it make much difference? From "PDP-11/45 Processor Handbook, 1973" (somewhat yellowed by now): The processor used in the 11/45, 11/50, and 11/55 actually had two data paths to memory. One went to the normal system Unibus, and the other was a dedicated data path that went only to the dedicated local memory controllers. On the 11/45, there were no solid-state memory controllers installed, so all accesses to memory went via the Unibus and the special path was unused. On the 11/55, there was 1 or 2 special memory controllers connected to this interface, via dedicated slots in the CPU backplane. (I think DEC called this special interface the FASTBUS). Each memory controller could have bipolar or MOS memory attached to it. The bipolar memory was 300 ns access time, and you always used 4 boards on a controller, which gave you 4kw (16-bit words). Mos memory was 450 ns access with 4kw per card, and a controller could have 1-4 MOS boards giving 4-16kw. Each controller was all bipolar or all MOS, but one controller could have bipolar and the other MOS, giving a maximum complement of 8kw bipolar, 32kw MOS, or 4k bipolar plus 16K MOS. (Of course, you could also put memory on the main Unibus, but access was slower). These controllers were dual-ported, so they watched both the CPU memory interface and the UNIBUS, allowing peripherals to have access to the memory transparently. It should have made a big difference in performance; the 11/45 was capable of executing simple instructions (register-register add, failed conditional branch, etc.) one every 300 ns, as fast at they could be fetched from bipolar memory. Compare this to something like a VAX 780, or the 800 ns or so necessary to get a word from Unibus memory. The only 11/55 I ever saw was used at Waterloo to run a programming lab where lots of undergrads edited text files and then submitted the output to the local HASP machine for compile and execute. It did handle quite a few users (60?) but the system didn't let them do much. The above description is actually a simplification; the solid-state memory controllers were actually dual-ported to a second unibus, called "unibus B", not the main unibus (unibus A) which connected to the peripherals and other memory. Normally, a simple jumper was used to short the two unibuses together, in which case they became a single bus and solid-state memory really was dual-ported with the main unibus. However, if you removed this jumper, you could connect unibus B to another CPU's unibus, allowing that processor dual-ported access to the solid-state memory. The main CPU contained a bus arbitrator only for unibus A, so whatever unibus B was connected to had to provide its own arbitrator (e.g. another CPU). The 11/45 had interlocked memory access instructions, so multi-processor semaphores were possible via the shared memory. Another piece of trivia, and the reason the /45 was my favourite model of the PDP-11: the Unibus arbitrator ran even when the CPU was halted - it was a separate piece of hardware. Thus, you could use the console switches to deposit cylinder and track addresses and a "read" command into a disc controller, and the data appeared in memory. No boot code was necessary. For other members of the family, the bus arbitrator ran only when microcode was executing, so you needed to be executing instructions (just branch-to-self would do) in order for DMA to memory to work.
guy@gorodish.UUCP (10/28/87)
> Another piece of trivia, and the reason the /45 was my favourite model > of the PDP-11: the Unibus arbitrator ran even when the CPU was halted - > it was a separate piece of hardware. Thus, you could use the console > switches to deposit cylinder and track addresses and a "read" command > into a disc controller, and the data appeared in memory. No boot code > was necessary. For other members of the family, the bus arbitrator > ran only when microcode was executing, so you needed to be executing > instructions (just branch-to-self would do) in order for DMA to memory > to work. I think this worked on the 11/34 as well; the instructions for bringing up V6 on an 11/34 with no console switches involved stuffing addresses and commands into the RK05 controller's registers in order to yank the requisite blocks from "/unix" and "/etc/init" in order to patch them and to write them back. Guy Harris {ihnp4, decvax, seismo, decwrl, ...}!sun!guy guy@sun.com
anderson@vms.macc.wisc.edu.UUCP (10/29/87)
In article <15417@onfcanim.UUCP> dave@onfcanim.UUCP (Dave Martindale) writes: ]In article <2949@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: ]>In article <29933@sun.uucp> guy%gorodish@Sun.COM (Guy Harris) writes: And a whole lot of other people have written: PLEASE edit your Newgroups line to remove comp.os.minix, so that we are not once again inundated with this discussion in a place where it has no relevance. I won't be the only one who thanks you if you exercise some judgment about where your messages go. ==ARPA:=========anderson@vms.macc.wisc.edu===Jess Anderson====== | UUCP: {harvard,rutgers,akgua,ihnp4, 1210 W. Dayton | | allegra,ucbvax}!spool!uwwircs!anderson Madison, WI 53706 | ==BITNET:================anderson@wiscmacc===608/263-6988=======
anderson@vms.macc.wisc.edu (Jess Anderson) (10/29/87)
In article <32222@sun.uucp> guy%gorodish@Sun.COM (Guy Harris) writes: Things of no interest to comp.os.minix whatever. Please edit your Newgroups line to drop comp.os.minix and spare us another round of intellectual pollution. ==ARPA:=========anderson@vms.macc.wisc.edu===Jess Anderson====== | UUCP: {harvard,rutgers,akgua,ihnp4, 1210 W. Dayton | | allegra,ucbvax}!spool!uwwircs!anderson Madison, WI 53706 | ==BITNET:================anderson@wiscmacc===608/263-6988=======
gwyn@brl-smoke.ARPA (Doug Gwyn ) (10/30/87)
In article <1922@uwmacc.UUCP> anderson@vms3.macc.wisc.edu (Jess Anderson) writes: >Things of no interest to comp.os.minix whatever. It doesn't seem to be very UNIX-WIZARDS related, either...
thomson@uthub.UUCP (10/30/87)
One of the first acts of Unix kernel hacking I did was to fiddle the (V7? or maybe 6?) startup on our 11/50 so the kernel text was moved up to the top of physical memory, which is where we had the 64KB of MOS memory. The system ran noticeably faster with that change. sysfix.c, anyone? -- Brian Thomson, CSRI Univ. of Toronto utcsri!uthub!thomson, thomson@hub.toronto.edu
pdb@sei.cmu.edu (Patrick Barron) (10/30/87)
In article <6627@brl-smoke.ARPA> gwyn@brl.arpa (Doug Gwyn (VLD/VMB) <gwyn>) writes: >In article <1922@uwmacc.UUCP> anderson@vms3.macc.wisc.edu (Jess Anderson) writes: >>Things of no interest to comp.os.minix whatever. > >It doesn't seem to be very UNIX-WIZARDS related, either... This discussion would certainly be welcome over at the INFO-PDP11 mailing list (info-pdp11@sei.cmu.edu). --Pat.
lwall@devvax.JPL.NASA.GOV (Larry Wall) (11/05/87)
We had an 11/50 at Seattle Pacific University. (Before that we had an 11/20 on which we actually ran RSTS! Swap city!) The 16kw MOS memory was nice to put the BASIC+ runtime system in, but about that time they started coming out with other runtime systems for RSTS, and the MOS memory didn't buy us much. On top of which, the MOS was extremely static sensitive and pooped out several times a year. We sold the MOS memory and bought a cache (from Able) for about the same price. That made the whole machine run faster, at much less of a price than a cabinetfull of bipolar. The cache just sat on the FASTBUS and pretended to be very fast memory. In fact, up to the point where it started thrashing, the 45 would outperform an 11/70. I still have a soft spot for that zippy little machine. The Able folks were real nice too. There was the time I shorted out one of our power supplies, and the Able fellow tore it apart and fixed it himself. DEC field service would have had a fit if they'd found out, which they didn't. The time DEC did have fits was their own fault--pushing a drawer back in they shorted a power harness across the backplane. Happened to be the pins for the Unibus. Fried just about every device up and down the bus. To DEC's credit, they fixed everything up, even the "foreign" stuff. You've never seen a more sheepish-looking field engineer. Anyway, the FASTBUS could be used for more than just MOS and bipolar memory. Larry Wall lwall@jpl-devvax.jpl.nasa.gov
pdb@sei.cmu.edu (Patrick Barron) (01/01/88)
In article <2818@aw.sei.cmu.edu> pdb@sei.cmu.edu (Pat Barron) writes: >The 11/74 was a prototype multiprocessor 11/70. I think only one was ever >made. The 11/73 is the Q-bus 11/70 (based on the J-11 chipset). The 11/83 >is a faster 11/73 with a special memory bus (the PMI bus). The 11/84 is a >Q-bus 11/83. Whoops! Did I actually say that? What I meant was that the 11/84 is a *Unibus* 11/83.... --Pat.