mash@mips.COM (John Mashey) (01/31/88)
In article <3127@phri.UUCP> roy@phri.UUCP (Roy Smith) writes: >In article <28200089@ccvaxa> aglew@ccvaxa.UUCP writes: >> I wonder how much interest might be out there for a true double-precision >> floating point engine .... > Actually, I wonder if a RISC-FPP would make sense.... Made a lot of sense to us. MIPS R2010 FPU is a single-chip RISC (+-*/, no transcendentals) FPU, optimized heavily to make the most frequent operations go fast in double precision. The cycle counts are: SP DP Add/Sub 2 2 Multiply 4 5 Divide 12 19 -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086