[comp.arch] Futurebus status

johnt@orca.TEK.COM (John Theus) (03/11/88)

Hugh LaMaster <lamaster@ames.arc.nasa.gov> sent me mail asking for a posting
on the current status of Futurebus, so here goes.

Futurebus, also known as IEEE 896.1-1987, became an IEEE standard in October
1987.   Copies of the working group's marked up specification is available
from the IEEE.  The IEEE published spec will be available in about 6 months.
It's taking the IEEE about a year to publish these standards.

The 896.1 document contains the physical, electrical and protocol specifications
you would expect in a bus standard, plus specs for live insertion and a set
of defined addresses for very basic bus-management functions (CSR addresses).

The working group is about ready to ballot the next layer of specification,
P896.2.  This document will contain chapters on cache coherence, bus repeaters,
message passing, event management and a more complete CSR definition.

All of the Futurebus implementations that I know about are either by
commercial systems manufactures or government related (US and UK) systems
contractors.  I have seen no evidence of a commercial board business showing
up anytime soon.  Several IC houses are building transceivers and controllers.
I don't think any of the controllers have been announced.

The highest performance implementation I have seen so far moves blocks of
data at 80M bytes/sec.  With the current fully-compelled handshake and 32
bit data width, transfer rate probably would top out at about 120M bytes/sec.

At the next meeting (see below), I will be proposing an upwards compatible
extension that provides for 64 bit addressing, and 64 or 128 bit data.  The
address and data width extensions are independent of one another, i.e. you
can select one without the other.  The proposal also includes a new
non-compelled handshake for fixed-length block transfers that should provide
at least a 2 times improvement in signaling rate.  With 64 bit data and
the new handshake, transfer rates in the 400M to 500M byte/sec range should
be possible.

Futurebus meetings are open to the public, and membership is gained through
participation.  The next meeting is Monday, March 14 at 0930.  The meeting
will be hosted by Mike Teener (408)973-3521 of Apple Computer, 10475
Bandley Drive, Cupertino, California.

John Theus	johnt@hammer.GWD.TEK.COM or tektronix!hammer!johnt
Futurebus parallel protocol coordinator
Tektronix, Inc.

pauls@nsc.nsc.com (Paul Sweazey) (03/12/88)

The meeting that John Theus announced on Monday is a joint
meeting of the CSR and Event Management Task Group and the
Bus Repeaters and Message Passing Task Group.  An overall
meeting of the P896.2 Working Group (to which these task
groups and others report) will occur two days later.

Futurebus Working Group Meeting

Host and Chairman:	Dr. Paul Borrill (408-721-7443)
Time:			8:30am-4:30pm, Wednesday, March 16, 1988
Place:			National Semiconductor
			Bldg 16, Kifer Rd, Santa Clara, CA
			Left at 2nd light west of Lawrence Expressway

Don't be too intimidated by the 8:30am hour.  We EXPECT people to
dribble in for an hour or so.  Besides the proposed width and
protocol extensions, the Task Group on Cache Coherence will hand
over the caching specification to the Working Group.  These meetings
are open to the public, and IEEE membership is not required to
participate.

Paul Sweazey