rick@pcrat.UUCP (Rick Richardson) (03/22/88)
Having spent the better part of my career building imbedded systems around all sorts of braindamaged microprocessors and listening to hardware types bitch that they can't increase the clock for fear of failing EMI, I'd like to know if anyone is working on a RISC microcontroller. Given the around 20,000 dhrystone performance of SPARC and MIPS at 16 Mhz clock, I feel confident that: 1) 1/8 of this clock would beat the pants off of the uP's we typically use today by a factor of two. 2) I could convince the hardware types to use a 16 bit bus (instead of 8) given that the performance is there and the EMI isn't. I doubt I could convince them to move up to 32 bits, however. 3) I could also (probably) convince HW that they'd still be saving money even if we need twice as much program ROM to accomodate the RISC philosophy. Is anybody working on a RISC micrcontroller with about 2000 dhrystones @ highest frequency == 4 Mhz, on a 8/16 bit bus, with a state-of-the-art C compiler and a cost not to exceed $10 in 100K quantities????? Oh, don't forget the ICE for it; prefer that the ICE take COFF format load modules. The ICE should cost no more than $15K. Give us 9. We'd pay up to 25K for the cross C compiler binary license on a super-mini. Don't forget to make sure the chip is compatible with popular peripheral chips (both MUX'ed and non-MUX'ed addressing!!!). -- Rick Richardson, President, PC Research, Inc. (201) 542-3734 (voice, nights) OR (201) 834-1378 (voice, days) uunet!pcrat!rick (UUCP) rick%pcrat.uucp@uunet.uu.net (INTERNET)