[comp.arch] Hardware description languages as H/W engineer tool.

fpst@hubcap.UUCP (Steve Stevenson) (04/01/88)

I have been toying with the following ideas for some time now.  I
would like comments from folks with any opinion.

	We are up to our ears in writing compilers for machines that
aren't exactly your garden variety von Neumann machine.  In many ways,
it's back to square one.  It seems to me that I need to be able
to be told directly by the architect the basic functioning of the
machine (ala say ISP.  I know, much of this has been done in PQCC).

	My questions - forgetting the difficulty of dealing with 
language issue -  are these:
	What features / constructs are needed to pass information
	between the hardware and software communities.

	Given the substantial work done already on hardware descrition
	languages, is one as complete as another?  Do they
	handle these new boxes like hypercubes well?

	What general guidance does the hardware community have in
	"verbalizing" machine architecture.  That is, I want to
	deal with code generators without having to sweat over them
	- how do I look at these descriptions and process them.


-- 
Steve Stevenson                            fpst@hubcap.clemson.edu
(aka D. E. Stevenson),                     fpst@clemson.csnet
Department of Computer Science,            comp.parallel
Clemson University, Clemson, SC 29634-1906 (803)656-5880.mabell