[comp.arch] Cache Terminology?

niven@sequent.UUCP (Kevin Joyce) (03/30/88)

 It Has Come To My Attention That There Are Two Quite Different Definitions
For The Word Set In Cache Architecture Circles. For Simplicity Assume A Two-
Way Set Associative Architecture. Also Assume Block Size And Line Size Are The
Same . In This Case One Definition Of Set Is That It Refers Any 2 Blocks Of 
Memory, Both Of Which Are Searched Associatively For A Given Data Word. In
This Case The Set Size Is Two And The Number Of Sets Is Half The Number Of
Blocks In The Entire Cache. Implementation Of This Architecture Might Involve
Two Banks Of Memory Chips. Sets, By The This Definition, Are Divided Between
These Banks. One Of The Two Blocks Of Each Set Is In Either Bank. Both Banks
Are Searched Simultaneously For An Data Access. 

The Alternate Definition, I Have Come Across For Sets, Is In Referring To Each 
Of The Memory Banks Described Above As A Set (Eg Set0 And Set1). With This 
Latter Definition The Set Size Is Now The Number Of Blocks In That Bank Of 
Memory, And The Number Of Sets Is Two. 

So Which Is The Industry Accepted Standard? Does Anyone Care ? It Certainly
Makes No Difference To The Hardware How Things Are Named.

sequent!niven

petolino%joe@Sun.COM (Joe Petolino) (03/31/88)

> It Has Come To My Attention That There Are Two Quite Different Definitions
>For The Word Set In Cache Architecture Circles.
>For Simplicity Assume A Two- Way Set Associative Architecture. . . .
>One Definition Of Set Is That It Refers Any 2 Blocks Of 
>Memory, Both Of Which Are Searched Associatively For A Given Data Word. In
>This Case The Set Size Is Two And The Number Of Sets Is Half The Number Of
>Blocks In The Entire Cache. . . .
>The Alternate Definition [Refer] To Each 
>Of The Memory Banks  . . . As A Set (Eg Set0 And Set1). With This 
>Latter Definition The Set Size Is Now The Number Of Blocks In That Bank Of 
>Memory, And The Number Of Sets Is Two. 
>
>So Which Is The Industry Accepted Standard? Does Anyone Care?

Yes, I Care.  I Wish People Would Stop Using The Second Definition.

Uppercase aside, this is a particularly nasty problem, since, whichever
definition you choose, there is no generally-accepted name for the other
thing.  The first definition has obvious mathematical roots (the cache is not
truly an 'associative' memory, but, on a given access, a *subset* of the
cache is selected and its operation is associative *within that set*, i.e.,
it is 'set-associative').  I have always thought that the use of the word
'set' to mean 'memory bank' was perpetrated by people who wanted to lend an
air of academic authority to their speech but didn't quite get it right.  It
does seem fairly widespread in the industry, however, mainly because the
thing they are referring to (the 'memory bank') is a very basic and useful
concept for hardware designers to talk about, and there isn't any other good
name for it.  I usually call this thing an 'associativity', but that's too
cumbersome (seven syllables!).  Any other suggestions?

-Joe

cquenel@pyramid.pyramid.com (Christopher Quenelle) (03/31/88)

Disclaimer first : I KNOW NOTHING!    :-)

In article <47555@sun.uucp> petolino@sun.UUCP (Joe Petolino) writes:
>thing they are referring to (the 'memory bank') is a very basic and useful
				   ^^^^^^^^^^^
>concept for hardware designers to talk about, and there isn't any other good
>name for it.  I usually call this thing an 'associativity', but that's too
>cumbersome (seven syllables!).  Any other suggestions?
>
>-Joe

	Sheesh, man, call it a MEMORY BANK.
	The reason people don't is 'cuz they sound like
	they're in a grade B sci-fi movie. :-)
	but that's what it sounds like to me.

	actually it sounds like "cache bank" might be better.


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dam@mtgzz.UUCP (XMRN40000[kvm]-d.a.morano) (04/01/88)

In article <3298@sequent.UUCP>, niven@sequent.UUCP (Kevin Joyce) writes:
> 
>  It Has Come To My Attention That There Are Two Quite Different Definitions
> For The Word Set In Cache Architecture Circles. For Simplicity Assume A Two-
> Way Set Associative Architecture. Also Assume Block Size And Line Size Are The

I have always used the definition that in the example of a 2-way 
set associate cache, that there are 2 blocks in every set and 
that the total number of sets is equal to half of the total 
number of blocks in the entire cache.  A 4-way set associative cache
would have 4 blocks in every set, etc.  Also, a 2-way set associative
cache would consists of two "groups", 4-way would have 4 groups, etc.
The entries in a group would consist of one block from each set in 
the cache.  The amount of associative parallelism (number of tag 
comparators) is directly related to the number of groups in the 
cache which is equal to the number of blocks in a set.  Sets can be 
numbered from the top starting at 0.  The set number is in fact 
usually the hardware address used to access the blocks in that set.
Groups can also be numbered (ie: group0, and group1 for 2-way) but
this numbering is usually not as useful or meaningful in the hardware
as the set number.  This definition seemed to be the one of choice, 
if not the only definition, in the literature before approximately 1982.  
Since then, caches have become much more common in microprocessor based 
computers and it seems that the definition of a set has also become 
much more ambiguous.

Also, in the last few years, the term "line" has become much more common
but can usually be assumed to refer to a cache block.

In the last few years, I have had to pick up the various cache definitions
of the speaker dynamically from the context of any discussion on caches.
Given a vote, I prefer Kevin's former definition as I have also stated 
above.  This seems to be the more traditional/historical definition.

Dave Morano	AT&T

fotland@hpcupt1.HP.COM (Dave Fotland) (04/02/88)

I use "way" as the name for a cache memory bank.
Thus a two way set associative cache has two blocks
in each set and two ways of associativity, or just
two ways for short.

-David Fotland