[comp.arch] Maximum MIPS for a given memory ban

aglew@urbsdc.Urbana.Gould.COM (06/14/88)

>I am confused. How can a risc machine have a higher "vax mips" than
>native mips? MORE (not less) risc instructions are required to
>do the same task, when compared to a vax.

Not always. Consider A=B+C, all in registers:
    VAX:
	mov rB,rA
	add rC,rA
    3 address RISC:
	add rA,rB,rC

So, we have an existence proof. What characteristics of the machine
actually let this happen?

guy@gorodish.Sun.COM (Guy Harris) (06/16/88)

> So, we have an existence proof.

No, we don't; look up "addl3" in your handy VAX architecture manual - the VAX
*does* have 3-address instructions....

aglew@urbsdc.Urbana.Gould.COM (06/16/88)

>>I am confused. How can a risc machine have a higher "vax mips" than
>>native mips? MORE (not less) risc instructions are required to
>>do the same task, when compared to a vax.
>
>Not always. Consider A=B+C, all in registers:
>    VAX:
>	mov rB,rA
>	add rC,rA
>    3 address RISC:
>	add rA,rB,rC
>
>So, we have an existence proof. What characteristics of the machine
>actually let this happen?

Well, I embarassed myself. If I'd said 68000 I could almost have
gotten away with it, but the VAX has 3 address instructions.

VAX is kind of the ultimate CISC (there could be a whole discussion
about this); the point I wanted to make was that number of CISC
instructions is not necessarily less than number of RISC instructions,
due to things like 3 address instructions and choice of operations.
The 88000 bit field instructions are a good example of the last
- simple enough for brute force implementation, but powerful.

firth@sei.cmu.edu (Robert Firth) (06/16/88)

In article <28200161@urbsdc> aglew@urbsdc.Urbana.Gould.COM writes:

))I am confused. How can a risc machine have a higher "vax mips" than
))native mips? MORE (not less) risc instructions are required to
))do the same task, when compared to a vax.
)
)Not always. Consider A=B+C, all in registers:
)    VAX:
)	mov rB,rA
)	add rC,rA
)    3 address RISC:
)	add rA,rB,rC
)
)So, we have an existence proof. What characteristics of the machine
)actually let this happen?

There are no VAX instructions called "mov" and "add".  Perhaps the
author meant to write

	MOVL  Rb,Ra
	ADDL2 Rc,Ra

But in any event, what he ought to have written is

	ADDL3 Rb,Rc,Ra

which, like the generic risc, is one instruction and 4 bytes.