mark@mips.COM (Mark G. Johnson) (06/17/88)
In article <511@pcrat.UUCP>, rick@pcrat.UUCP (Rick Richardson) writes of a Crippled RISC > ... around 4 Mhz for EMI and power reasons... > ... at most a 16 bit bus... > ... 2800 Dhrystones for a hypothetical 4 Mhz, 16 bit bus RISC > ... Chip cost is important ($10) > Based upon current volumes, these new products have projected > volumes of 6-7 figures. If the volumes are really this big, then a ruthless cost-slashing consumer product approach (a la Atari video game, TI 99/4, McIntosh) might be appropriate. In which case it may be advisable to build the CPU chip yourself, in a really low-cost, low-pincount, low-power, plastic packaged CMOS gate array. Costs are indeed tiny when volumes are immense. Gate array vendors are plentiful so 2nd sources are a given. And the engineering expense is amortized over a lot of units. Unfortunately the article also said > Time is short here. Too bad... sounds like the old story: we'd rather have a decent, sellable product TODAY, than a terriffic, killer product tomorrow. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086 {decvax,ucbvax,ihnp4}!decwrl!mips!mark (408) 991-0208