[comp.arch] 88k trick for FP abs/neg

mark@mips.COM (Mark G. Johnson) (07/06/88)

 
In article <10136@tekecs.TEK.COM>, andrew@frip.gwd.tek.com (Andrew Klossner)
writes
	> To clear up a question: on the 88k, floating point values are
	> kept in general registers, so "abs" is done by ANDing to 0 the
	> sign bit, "neg" is done by XORing the sign bit, and "mov" is
	> done with conventional register-to-register move instructions.

Oughtn't the operand be first tested for "IEEE-ness"?  Specifically,
what if the operand of  neg  is a Signaling NaN?  Oughtn't this cause
an invalid operation exception?

Or perhaps this a case of "should" versus "shall" in the IEEE spec.....
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	...!decwrl!mips!mark	(408) 991-0208

yuval@taux01.UUCP (Gideon Yuval) (07/07/88)

> Oughtn't the operand be first tested for "IEEE-ness"?  Specifically,
> what if the operand of  neg  is a Signaling NaN?  Oughtn't this cause
> an invalid operation exception?

The "Recommended Functions & Predicates" section of the standard has:

"-x is x copied with its sign reversed, not 0-x; the distinction is germane
when x is +-0 or NaN."

From this, the obvious conclusion is that -NaN is that same NaN with its
sign reversed.

Same goes for abs(x); "abs(x)=copysign(x,1.0), even if x is a NaN".
-- 
Gideon Yuval, yuval@taux01.nsc.com, +972-2-690992 (home) ,-52-522255(work)
 Paper-mail: National Semiconductor, 6 Maskit St., Herzliyah, Israel
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mcdonald@uxe.cso.uiuc.edu (07/07/88)

 
>In article <10136@tekecs.TEK.COM>, andrew@frip.gwd.tek.com (Andrew Klossner)
>writes
>	> To clear up a question: on the 88k, floating point values are
>	> kept in general registers, so "abs" is done by ANDing to 0 the
>	> sign bit, "neg" is done by XORing the sign bit, and "mov" is
>	> done with conventional register-to-register move instructions.
>
>Oughtn't the operand be first tested for "IEEE-ness"?  Specifically,
>what if the operand of  neg  is a Signaling NaN?  Oughtn't this cause
>an invalid operation exception?

Not if you expect to actually use or sell the resulting code. Testing
for special cases slows code down horribly, ESPECIALLY in cases like
this where otherwise it would take only 1 cycle or in that vicinity!
It would be fine for debugging.

aglew@urbsdc.Urbana.Gould.COM (07/07/88)

>In article <10136@tekecs.TEK.COM>, andrew@frip.gwd.tek.com (Andrew Klossner)
>writes
>	> To clear up a question: on the 88k, floating point values are
>	> kept in general registers, so "abs" is done by ANDing to 0 the
>	> sign bit, "neg" is done by XORing the sign bit, and "mov" is
>	> done with conventional register-to-register move instructions.
>
>Oughtn't the operand be first tested for "IEEE-ness"?  Specifically,
>what if the operand of  neg  is a Signaling NaN?  Oughtn't this cause
>an invalid operation exception?
>
>Or perhaps this a case of "should" versus "shall" in the IEEE spec.....
>
> -- Mark Johnson	
> 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086

My copy says "Signaling NaNs shall be reserved operands that signal
the invalid operation exception for every operation listed in
Section 5. Whether copying a signaling NaN without a change of format
signals the invalid operation exception is the implementor's option".
	"neg" doesn't seem to be explicitly called out, but is
implied by subtraction, I think, as one of the operations.
	Of course, signalling NaNs must be able to set a flag
when encountered, but need not (should) trap.

The question is, of course, whether an explicit test for NaNness
followed by conventional arithmetic might not be faster than
a special purpose FP instruction that combines the test and the
NaN detection flag setting.


Andy "Krazy" Glew. Gould CSD-Urbana.    1101 E. University, Urbana, IL 61801   
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firth@sei.cmu.edu (Robert Firth) (07/08/88)

In article <10136@tekecs.TEK.COM>, andrew@frip.gwd.tek.com (Andrew Klossner)
writes
	> To clear up a question: on the 88k, floating point values are
	> kept in general registers, so "abs" is done by ANDing to 0 the
	> sign bit, "neg" is done by XORing the sign bit, and "mov" is
	> done with conventional register-to-register move instructions.

Ho boy! The last time I saw a compiler XOR the sign bit of floating zero
must have been about 1975.  Old bugs never die, they just migrate to new
hosts.

bruce@Stride.COM (Bruce Robertson) (07/12/88)

In article <6160@aw.sei.cmu.edu> firth@bd.sei.cmu.edu.UUCP (Robert Firth) writes:
>
>Ho boy! The last time I saw a compiler XOR the sign bit of floating zero
>must have been about 1975.  Old bugs never die, they just migrate to new
>hosts.

With IEEE floating point, negating 0.0 to produce -0.0 is correct.
-- 

	Bruce Robertson
	MicroSage Computer Systems
	bruce@stride.com