dwc@homxc.UUCP (Malaclypse the Elder) (08/09/88)
In article <3259@leo.UUCP>, jack@leo.UUCP ( Jack Benkual) writes: > In article <3420@phri.UUCP>, roy@phri.UUCP (Roy Smith) writes: > > > > For months I've been listening to people talking about "4.3-tahoe" > > but I still havn't seen anybody explain what a "tahoe" is. > > -- > > Tahoe was the project name for the CCI Power 6/32 Superminicomputer available > since 1985. It has an architecture very similar to VAX/780 and probably that > and the higher performance (8 VAX MIPS in 1985) was the reason that Berkeley > released 4.3-Tahoe. does the tahoe have a more limited kernel address space than the vax? the reason i ask is that at the recent usenix conference in san francisco, kirk mckusick presented the architecture of the new kernel memory allocator for bsd. it turns out that for memory requests smaller than a page or two, they do allocation based on a power of 2 scheme (not really a binary buddy system since they do not do coalescing). but for memory requests larger than a page or two, they do something like a first fit (i don't remember exactly what). since the primary disadvantage of a power of 2 scheme is internal memory fragmentation, i asked why, for large allocations, they did not implement a buddy scheme (or their power of 2 scheme) to allocate kernel virtual address space and simply allocate the minimal amount of physical pages necessary to satisfy the request. that way, you have the fast allocation of the buddy system with minimal fragmentation of physical memory resources. (also thrown in are kernel traps in case you ever use much more than you asked for). the response i got from him was that not only was it not desirable to have internal fragmentation of physical memory but there were systems with limited kernel address space and that it was undesirable to have fragmentation of virtual address space. since all the modern processors that i know of (not many) have address spaces of at least 4Gbytes with at least 1/4 going to kernel, i did not think this was an issue. now i learn of this tahoe processor which the bsd distribution is based on. is this the system he had in mind when he said that there are processors with limited kernel address space? more importantly, should one design a system that is going to be ported to many processors based on such a restriction? danny chen att!homxc!dwc
chris@mimsy.UUCP (Chris Torek) (08/11/88)
In article <2991@homxc.UUCP> dwc@homxc.UUCP (Malaclypse the Elder) writes: >does the tahoe have a more limited kernel address space than the vax? No, in fact, the virtual space is the same size, although it runs from 0xc0000000 to 0xffffffff rather than 0x80000000 to 0xbfffffff. >[in re the 4.3-tahoe kernel malloc, McKusick claimed] that not only was >it not desirable to have internal fragmentation of physical memory This is somewhat debatable. It would be (much) more important if the kernel malloc had a flag telling it to allocate physically contiguous pages, as is required by some of the VAX hardware, e.g. (I keep trying to convince Mike to put this in . . . .) >but [also that] there were systems with limited kernel address space >and that it was undesirable to have fragmentation of virtual address space. >since all the modern processors that i know of (not many) have address >spaces of at least 4Gbytes with at least 1/4 going to kernel, i did >not think this was an issue. While the VAX has a 1 GB kernel space, kernel virtual memory is only mapped by a single level of PTEs, and it takes 1K of physical (PTE) memory to map each 128K of virtual space. A fully populated virtual map would take 8MB of physical memory, which is a bit much. A more reasonable kernel virtual space of (say) 10MB would take a more reasonable 80KB, so that seems feasible. I believe the Tahoe's system space also uses single-level PTEs, while the system space on, e.g., the NS32000 series is two-level. Of course, on machines like the MIPS with software address translation, one can simply use region descriptors. -- In-Real-Life: Chris Torek, Univ of MD Comp Sci Dept (+1 301 454 7163) Domain: chris@mimsy.umd.edu Path: uunet!mimsy!chris
seeger@beach.cis.ufl.edu (Charles Seeger) (08/11/88)
We received our HCX-9 about a year ago. It's been that long since I looked at the architecture docs, but I seem to remember that the memory partitioning was pretty much the same as the VAX. In other words, the kernel gets 1/4 of the 4 GB address space. I'm open to correction, if anyone knows different. Chuck