spcecdt@ucscb.UCSC.EDU (Space Cadet) (08/11/88)
I recall reading some time ago about a project that Clive Sinclair was
working on to make "solid-state disks" using wafer scale integration. The
idea was to use some shift-register like scheme connecting the memory arrays
on the wafer so that defective arrays could be bypassed. Does anyone know
if this is still being worked on?
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> John H. DuBois III # spcecdt@ucscb.ucsc.EDU ...!ucbvax!ucscc!ucscb!spcecdt <Lynx@cup.portal.com (08/18/88)
I called up the company that was doing that in England about 2 years ago, and they claimed to be getting ready to ship a first-generation product which, it seemed, cost as much as getting separate chips would have cost. I asked them to send me info when they were ready with their second-generation product, which should have cost much less than equiv. memory, and none ever came. That's the last I heard of it.