matt@srs.UUCP (Matt Goheen) (07/30/88)
I have always been led to believe that Sun's rating of the Sun 4/200
series as 10 MIPS to be "Vax" MIPS (this goes for the 7 MIPS 4/110
as well). Well, it appears this this isn't the case. In the most
recent issue of "Sun Technology", there is an article by Robert
Garner (one of the members of the SPARC development team). Mr.
Garner uses the term "SPARC MIPS" when referring to the 10 MIPS
rating of the 4/200. To make a comparison to the 3/200 series, he
states that the SPARC typically needs about 25% more instructions
to complete a given task than a 68020 does. He rates the 3/200
series as 3.8 "MC68020 MIPS". To make a speed comparison of the
3/200 to the 4/200, the following formula is used:
10.0 MIPS
Sun-4/200
perf = 0.8 * ----------------- = 2.0
4/200,3/200 3.8 MIPS
Sun-3/200
Therefore, if we make the (poor) assumption that a 68020 MIPS is
about equal to a VAX MIPS, we get a rating of about 8.0 Vax MIPS
for the Sun 4/200 (we CAN say 8.0 MC68020 MIPS). This contradicts
other articles I have seen published by Sun where the instruction
count to complete a given task is included in the MIPS calculation
(I believe one of these articles was in Sun's "A RISC Tutorial").
Using native MIPS ratings seems to be borderline dishonest as far
as I'm concerned. Certainly the whole thing should have been
presented a bit more clearly. Personally, I don't think anyone in
marketing should be allowed to write/print/think/say the word
"MIPS".
However, I must commend Sun on the publication of "Sun Technology"
(this Summer 1988 issue in particular). There are quite a few
useful articles within it...
--
- uucp: {rutgers,ames}!rochester!srs!matt Matt Goheen -
- maybe-nets: matt@srs.uucp OR matt%srs.uucp@harvard.harvard.edu -
- "We had some good machines, but they don't work no more." -pf@diab.se (Per Fogelstr|m) (07/31/88)
In article <941@srs.UUCP> srs!matt@cs.rochester.edu (Matt Goheen) writes: >I have always been led to believe that Sun's rating of the Sun 4/200 >series as 10 MIPS to be "Vax" MIPS (this goes for the 7 MIPS 4/110 >as well). Well, it appears this this isn't the case. ............ he >states that the SPARC typically needs about 25% more instructions >to complete a given task than a 68020 does. Recently ELECTRONICS had an article sereies on RISCS. One of the articles compared different cpu's introducing something called "instruction quality factor". In this comparision the VAX780 was rated 1.0 with its 0.47 MIPS performence. The funny thing that puzzels me was that most RISC designs had an "IQF" of 0.8 - 0.9 exept SPARC wich was rated 0.6. Assuming SPARC is a native 10MIPS cpu this would yield a 6 normalized mips cpu. I did the same comparition with my 32532 design. This 25Mhz prototype executes about 6-8 real MIPS (Yes there is a pin on the chip that pulses every time a new instruction is starte where i connect the counter). Okay, the IQF for this cpu must be very close to 1.0 since the architecture resembles the VAX architecture. In this case my 25Mhz 32532 design is a 15VAX MIPS processor. Well then, MIPS what the heck is it, really. At least it's useless when comparing different processor architectures.
anc@camcon.co.uk (Adrian Cockcroft) (08/05/88)
In article <941@srs.UUCP>, matt@srs.UUCP (Matt Goheen) writes: > I have always been led to believe that Sun's rating of the Sun 4/200 > series as 10 MIPS to be "Vax" MIPS (this goes for the 7 MIPS 4/110 > as well). Well, it appears this this isn't the case. ... > for the Sun 4/200 (we CAN say 8.0 MC68020 MIPS). This contradicts > other articles I have seen published by Sun where the instruction > count to complete a given task is included in the MIPS calculation > (I believe one of these articles was in Sun's "A RISC Tutorial"). I am in posession of an internal SUN document called Sun 4/200 benchmarks by Mike Schafir and Anh Nguyen. It predates the SUN4 announcement so it is marked for internal use only but over a year later there can't be much harm in spilling some beans. Note that the SUN 4/260 is a 16 MHz processor, the SUN 4/110 is a 14 MHz processor with slower memory. SUN claim 7 MIPS for the 4/110. It gives CPU-intensive benchmarks Dhrystone, Stanford Composite CPU, and CPU intensive utilitues. Floating point benchmarks Linpack, Spice, and Stanford composite. Also I/O subsystem performance. This is a quote: "Since the Sun 4-200 is a RISC based processor, we must be careful to make a valid comparison of MIPS. This is accomplished by making all comparisons relative to the speed of a VAX 11/780. The VAX 11/780 is generally considered to be a 1 MIPS processor. Thus, when we refer to 10 MIPS performance, we are referring to a performance that is 10 times faster than the processing speed of the VAX 11/780. It is our policy never to quote RISC MIPS". Results show 9 to 13 integer VAX MIPS. Dhrystone Stanford Int tbl nroff sort SUN 4/260 19000 13 356 9 0.1 1.7 0.6 SUN 3/260 7142 5 653 5 0.4 3.0 0.9 VAX 8600 6423 4.5 860 3.7 VAX 11/780 1428 1 3182 1 1.6 9.8 7.4 Results show 6 to 9 floating point VAX MIPS. The stanford is a 256 point floating point FFT. Linpack(sp) Linpack(dp) Spice Stanford SUN 4/260 1.6 MFLOPS 1.1 MFLOPS 19 secs 461 msecs SUN 3/260+fpa 0.86 0.46 31 584 VAX 8600 0.84 0.48 28 1420 VAX 11/780 0.25 0.14 154 3870 I reckon this shows pretty good justification for the 3/260 at 4 VAX MIPS and the 4/260 at 10 VAX MIPS on real applications. They are relatively better at integer than the VAX but worse at floating point. -- | Adrian Cockcroft ..!uunet!mcvax!ukc!camcon!anc -[T]- Cambridge Consultants Ltd, anc@uk.co.camcon or anc@camcon.uucp | Science Park, Cambridge CB4 4DW, England, UK (0223) 358855 (You are in a maze of twisty little C004's, all alike...)
anc@camcon.co.uk (Adrian Cockcroft) (08/08/88)
In article <941@srs.UUCP>, matt@srs.UUCP (Matt Goheen) writes: > I have always been led to believe that Sun's rating of the Sun 4/200 > series as 10 MIPS to be "Vax" MIPS (this goes for the 7 MIPS 4/110 > as well). Well, it appears this this isn't the case. ... > for the Sun 4/200 (we CAN say 8.0 MC68020 MIPS). This contradicts > other articles I have seen published by Sun where the instruction > count to complete a given task is included in the MIPS calculation > (I believe one of these articles was in Sun's "A RISC Tutorial"). I am in posession of an internal SUN document called Sun 4/200 benchmarks by Mike Schafir and Anh Nguyen. It predates the SUN4 announcement so it is marked for internal use only but over a year later there can't be much harm in spilling some beans. Note that the SUN 4/260 is a 16 MHz processor, the SUN 4/110 is a 14 MHz processor with slower memory. SUN claim 10 MIPS for the 4/260 and 7 MIPS for the 4/110. I use a 3/260+fpa (4 MIPS) and have access to a 4/110 which certainly seems a lot faster for everything. The document gives CPU-intensive benchmarks Dhrystone, Stanford Composite CPU, and CPU intensive utilitues. Floating point benchmarks Linpack, Spice, and Stanford composite. Also I/O subsystem performance. This is a quote: "Since the Sun 4-200 is a RISC based processor, we must be careful to make a valid comparison of MIPS. This is accomplished by making all comparisons relative to the speed of a VAX 11/780. The VAX 11/780 is generally considered to be a 1 MIPS processor. Thus, when we refer to 10 MIPS performance, we are referring to a performance that is 10 times faster than the processing speed of the VAX 11/780. It is our policy never to quote RISC MIPS". Results show 9 to 16 integer VAX MIPS. Dhrystone Stanford Int tbl nroff sort SUN 4/260 19000 13 356 9 0.1 1.7 0.6 SUN 3/260 7142 5 653 5 0.4 3.0 0.9 VAX 8600 6423 4.5 860 3.7 VAX 11/780 1428 1 3182 1 1.6 9.8 7.4 Results show 6 to 9 floating point VAX MIPS. The stanford is a 256 point floating point FFT. Linpack(sp) Linpack(dp) Spice Stanford SUN 4/260 1.6 MFLOPS 1.1 MFLOPS 19 secs 461 msecs SUN 3/260+fpa 0.86 0.46 31 584 VAX 8600 0.84 0.48 28 1420 VAX 11/780 0.25 0.14 154 3870 I reckon this shows pretty good justification for the 3/260 at 4 VAX MIPS and the 4/260 at 10 VAX MIPS on real applications. The SUN 4 is relatively better at integer than the VAX but worse at floating point. It uses the same weitek chipset as the 3/260+fpa. According to Bill Joy the current SUN 4 floating point is half what it should be since it is using old technology. The next SUN 4 should be twice the integer MIPS and four times the MFLOPS. -- | Adrian Cockcroft ..!uunet!mcvax!ukc!camcon!anc -[T]- Cambridge Consultants Ltd, anc@uk.co.camcon or anc@camcon.uucp | Science Park, Cambridge CB4 4DW, England, UK (0223) 358855 (You are in a maze of twisty little C004's, all alike...)
Lynx@cup.portal.com (08/18/88)
Someone came up with a good definition of MIPS: Misleading Indication of Processor Speed And that's about all they are.
pf@diab.se (Per Fogelstr|m) (08/19/88)
In article <8255@cup.portal.com> Lynx@cup.portal.com writes: >Someone came up with a good definition of MIPS: > >Misleading Indication of Processor Speed > >And that's about all they are. Here's another one: Meaningless Information Presented by Salesman !
hjm@cernvax.UUCP (hjm) (08/19/88)
In article <8255@cup.portal.com> Lynx@cup.portal.com writes: >Someone came up with a good definition of MIPS: > >Misleading Indication of Processor Speed > >And that's about all they are. Try: Meaningless Information for Pushy Salespersons Hubert Matthews
gillies@p.cs.uiuc.edu (08/19/88)
MIPS = "Meaningless Interpretation of Processor Speed"
root@helios.toronto.edu (Operator) (08/24/88)
MIPS = Marketing's Instrument for Pushing Sales
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