[comp.arch] RISC vs. CISC- a very quick & dirty argument

baum@Apple.COM (Allen J. Baum) (10/19/88)

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Here's a very simple argument for why a simple hardware architecture will
perform better than a more complicated one. (I just don't think there has
been enough flaming on the net lately, you see, with the NexT announcement
and all, so I thought I'd pour a little gasoline into the net-- or is that
a very mixed metaphor?)

There are a lot of tricks that RISC designers can pull, but when you get
right down to it, CISC designers can do them as well. The problem is, to
do them is a lot more work. They can make the chips run as fast- possibly-
but they'll have to work a lot harder to do it. When they are finished, lets
say (for arguments sake) they're 25% faster than a RISC designed done in the
same technology.

Meanwhile, a year or two has passed, and the next version of the RISC chip
has come out. Since its design was started a year later, the technology has
improved 30%. Since its simpler, the design was finished at the same time
as the CISC machine. Since its simpler, the RISC chip didn't have to go through
all the revs. that the CISC chip did (Intel just announced the 'bug-free'
version of the '386 this week!).

The bottom line: a year earlier is worth 30% performance. A RISC design can get
you to market a year earlier.

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