baum@Apple.COM (Allen J. Baum) (10/19/88)
[] Intel (BiiN actually, the joint venture with Siemens) has just announced their newest version of the 80960 architecture. It is a tagged architecture, (33-bit words). There is a 4 chip set: CPU, BXU (Bus interface), CP (channel processor) and MCU (Memory interface). The object oriented system allows processors to be added at will. There are 3 levels if fault tolerance, including the basic level of having a checker processor in parallel with the main processor. The system can address 2^26 objects of 2^32 bytes. 5.5Mips/CPU. $45,000 for the basic box (2 CPUs). Full UNIX, Ada. Dynamically reconfigurable HW/SW. Everything the 432 should have been. (This gleaned from EE Times 10/17) --
sedwards@esunix.UUCP (Scott Edwards) (10/26/88)
From article <18975@apple.Apple.COM>, by baum@Apple.COM (Allen J. Baum): > [] > > Intel (BiiN actually, the joint venture with Siemens) has just > announced their newest version of the 80960 architecture. It is a > .... [ stuff deleted for line counter ] > been. (This gleaned from EE Times 10/17) > > -- I love this, if it's new and innovative it must be a RISC! 224 instructions, including string operations and operating system functions. Risen from the ashes of the 432. Thanks, this really made my day -- Scott.